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<title><![CDATA[DVT Technicians (Test engineering)]]></title>
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Technicians<o:p></o:p></span></strong></p><p style="margin-bottom: 0.0001pt; line-height: 150%;" class="MsoNormal"><span style="font-size: 10pt; line-height: 150%; font-family: &quot;Arial&quot;,&quot;sans-serif&quot;; color: rgb(0, 32, 96);">Roles and Responsibilities</span></p><p style="margin-bottom: 0.0001pt; line-height: 150%;" class="MsoNormal"><span style="font-size: 10pt; line-height: 150%; font-family: &quot;Arial&quot;,&quot;sans-serif&quot;; color: rgb(0, 32, 96);"><o:p></o:p></span></p><p style="margin-bottom: 0.0001pt; line-height: 150%;" class="MsoNormal"><span style="font-size: 10pt; line-height: 150%; font-family: &quot;Arial&quot;,&quot;sans-serif&quot;; color: rgb(0, 32, 96);">1) To conduct Mechanical design verification testing (DVT) in accordance to<o:p></o:p></span></p><p style="margin-bottom: 0.0001pt; line-height: 150%;" class="MsoNormal"><span style="font-size: 10pt; line-height: 150%; font-family: &quot;Arial&quot;,&quot;sans-serif&quot;; color: rgb(0, 32, 96);">product vintage per project milestones.<o:p></o:p></span></p><p style="margin-bottom: 0.0001pt; line-height: 150%;" class="MsoNormal"><span style="font-size: 10pt; line-height: 150%; font-family: &quot;Arial&quot;,&quot;sans-serif&quot;; color: rgb(0, 32, 96);">2) To ensure the completion of each DVT group assigned to the technicians.<o:p></o:p></span></p><p style="margin-bottom: 0.0001pt; line-height: 150%;" class="MsoNormal"><span style="font-size: 10pt; line-height: 150%; font-family: &quot;Arial&quot;,&quot;sans-serif&quot;; color: rgb(0, 32, 96);">3) To tabulate the DVT results in the relevant templates and provide regular updates<o:p></o:p></span></p><p style="margin-bottom: 0.0001pt; line-height: 150%;" class="MsoNormal"><span style="font-size: 10pt; line-height: 150%; font-family: &quot;Arial&quot;,&quot;sans-serif&quot;; color: rgb(0, 32, 96);">after the tests&rsquo; completion, to the engineers in-charged.<o:p></o:p></span></p><p style="margin-bottom: 0.0001pt; line-height: 150%;" class="MsoNormal"><span style="font-size: 10pt; line-height: 150%; font-family: &quot;Arial&quot;,&quot;sans-serif&quot;; color: rgb(0, 32, 96);">4) Be able to assess the Pass/Fail for the outcome of the test results obtained.<o:p></o:p></span></p><p style="margin-bottom: 0.0001pt; line-height: 150%;" class="MsoNormal"><span style="font-size: 10pt; line-height: 150%; font-family: &quot;Arial&quot;,&quot;sans-serif&quot;; color: rgb(0, 32, 96);">5) To escalate/inform to the engineers in-charged in case of equipment or product<o:p></o:p></span></p><p style="margin-bottom: 0.0001pt; line-height: 150%;" class="MsoNormal"><span style="font-size: 10pt; line-height: 150%; font-family: &quot;Arial&quot;,&quot;sans-serif&quot;; color: rgb(0, 32, 96);">issues arise.<o:p></o:p></span></p><p style="margin-bottom: 0.0001pt; line-height: 150%;" class="MsoNormal"><span style="font-size: 10pt; line-height: 150%; font-family: &quot;Arial&quot;,&quot;sans-serif&quot;; color: rgb(0, 32, 96);">6) To provide proposals on opportunity for testing improvements in term of testing<o:p></o:p></span></p><p style="margin-bottom: 0.0001pt; line-height: 150%;" class="MsoNormal"><span style="font-size: 10pt; line-height: 150%; font-family: &quot;Arial&quot;,&quot;sans-serif&quot;; color: rgb(0, 32, 96);">method and resource arrangements.<o:p></o:p></span></p><p style="margin-bottom: 0.0001pt; line-height: 150%;" class="MsoNormal"><span style="font-size: 10pt; line-height: 150%; font-family: &quot;Arial&quot;,&quot;sans-serif&quot;; color: rgb(0, 32, 96);">7) To support in jig/fixtures fabrication product requirements.<o:p></o:p></span></p><p style="margin-bottom: 0.0001pt; line-height: 150%;" class="MsoNormal"><span style="font-size: 10pt; line-height: 150%; font-family: &quot;Arial&quot;,&quot;sans-serif&quot;; color: rgb(0, 32, 96);">8) To support in equipments maintenance per Calibration procedure.<o:p></o:p></span></p><p style="margin-bottom: 0.0001pt; line-height: 150%;" class="MsoNormal"><span style="font-size: 10pt; line-height: 150%; font-family: &quot;Arial&quot;,&quot;sans-serif&quot;; color: rgb(0, 32, 96);">9) To perform other duties as assigned by the immediate supervisors.</span></p><p style="margin-bottom: 0.0001pt; line-height: 150%;" class="MsoNormal"><span style="font-size: 10pt; line-height: 150%; font-family: &quot;Arial&quot;,&quot;sans-serif&quot;; color: rgb(0, 32, 96);"><o:p></o:p></span></p><p style="margin-bottom: 0.0001pt; line-height: 150%;" class="MsoNormal"><span style="font-size: 10pt; line-height: 150%; font-family: &quot;Arial&quot;,&quot;sans-serif&quot;; color: rgb(0, 32, 96);">Qualification Requirement</span></p><p style="margin-bottom: 0.0001pt; line-height: 150%;" class="MsoNormal"><span style="font-size: 10pt; line-height: 150%; font-family: &quot;Arial&quot;,&quot;sans-serif&quot;; color: rgb(0, 32, 96);"><o:p></o:p></span></p><p style="margin-bottom: 0.0001pt; line-height: 150%;" class="MsoNormal"><span style="font-size: 10pt; line-height: 150%; font-family: &quot;Arial&quot;,&quot;sans-serif&quot;; color: rgb(0, 32, 96);">_ ITE Graduate in Mechanical or Electromechanical with 1 or 2 years of<o:p></o:p></span></p><p style="margin-bottom: 0.0001pt; line-height: 150%;" class="MsoNormal"><span style="font-size: 10pt; line-height: 150%; font-family: &quot;Arial&quot;,&quot;sans-serif&quot;; color: rgb(0, 32, 96);">working experience.<o:p></o:p></span></p><p style="margin-bottom: 0.0001pt; line-height: 150%;" class="MsoNormal"><span style="font-size: 10pt; line-height: 150%; font-family: &quot;Arial&quot;,&quot;sans-serif&quot;; color: rgb(0, 32, 96);">_ Fresh Diploma Graduate in Mechanical or Electromechanical.<o:p></o:p></span></p><p style="margin-bottom: 0.0001pt; line-height: 150%;" class="MsoNormal"><span style="font-size: 10pt; line-height: 150%; font-family: &quot;Arial&quot;,&quot;sans-serif&quot;; color: rgb(0, 32, 96);">RST Engineer</span></p><p style="margin-bottom: 0.0001pt; line-height: 150%;" class="MsoNormal"><span style="font-size: 10pt; line-height: 150%; font-family: &quot;Arial&quot;,&quot;sans-serif&quot;; color: rgb(0, 32, 96);"><o:p></o:p></span></p><p style="margin-bottom: 0.0001pt; line-height: 150%;" class="MsoNormal"><span style="font-size: 10pt; line-height: 150%; font-family: &quot;Arial&quot;,&quot;sans-serif&quot;; color: rgb(0, 32, 96);">Job Responsibilities:</span></p><p style="margin-bottom: 0.0001pt; line-height: 150%;" class="MsoNormal"><span style="font-size: 10pt; line-height: 150%; font-family: &quot;Arial&quot;,&quot;sans-serif&quot;; color: rgb(0, 32, 96);"><o:p></o:p></span></p><p style="margin-bottom: 0.0001pt; line-height: 150%;" class="MsoNormal"><span style="font-size: 10pt; line-height: 150%; font-family: &quot;Arial&quot;,&quot;sans-serif&quot;; color: rgb(0, 32, 96);">- Performing RF test activities in meeting product submission<o:p></o:p></span></p><p style="margin-bottom: 0.0001pt; line-height: 150%;" class="MsoNormal"><span style="font-size: 10pt; line-height: 150%; font-family: &quot;Arial&quot;,&quot;sans-serif&quot;; color: rgb(0, 32, 96);">deadlines<o:p></o:p></span></p><p style="margin-bottom: 0.0001pt; line-height: 150%;" class="MsoNormal"><span style="font-size: 10pt; line-height: 150%; font-family: &quot;Arial&quot;,&quot;sans-serif&quot;; color: rgb(0, 32, 96);">- Managing test setup and debugging test program for Client RF<o:p></o:p></span></p><p style="margin-bottom: 0.0001pt; line-height: 150%;" class="MsoNormal"><span style="font-size: 10pt; line-height: 150%; font-family: &quot;Arial&quot;,&quot;sans-serif&quot;; color: rgb(0, 32, 96);">ATEs<o:p></o:p></span></p><p style="margin-bottom: 0.0001pt; line-height: 150%;" class="MsoNormal"><span style="font-size: 10pt; line-height: 150%; font-family: &quot;Arial&quot;,&quot;sans-serif&quot;; color: rgb(0, 32, 96);">- Research and implement new, innovative ways of providing<o:p></o:p></span></p><p style="margin-bottom: 0.0001pt; line-height: 150%;" class="MsoNormal"><span style="font-size: 10pt; line-height: 150%; font-family: &quot;Arial&quot;,&quot;sans-serif&quot;; color: rgb(0, 32, 96);">quality-testing and process automation.<o:p></o:p></span></p><p style="margin-bottom: 0.0001pt; line-height: 150%;" class="MsoNormal"><span style="font-size: 10pt; line-height: 150%; font-family: &quot;Arial&quot;,&quot;sans-serif&quot;; color: rgb(0, 32, 96);">- Assist other test team members to resolve technical issues and<o:p></o:p></span></p><p style="margin-bottom: 0.0001pt; line-height: 150%;" class="MsoNormal"><span style="font-size: 10pt; line-height: 150%; font-family: &quot;Arial&quot;,&quot;sans-serif&quot;; color: rgb(0, 32, 96);">perform site to site correlations.</span></p><p style="margin-bottom: 0.0001pt; line-height: 150%;" class="MsoNormal"><span style="font-size: 10pt; line-height: 150%; font-family: &quot;Arial&quot;,&quot;sans-serif&quot;; color: rgb(0, 32, 96);"><o:p></o:p></span></p><p style="margin-bottom: 0.0001pt; line-height: 150%;" class="MsoNormal"><span style="font-size: 10pt; line-height: 150%; font-family: &quot;Arial&quot;,&quot;sans-serif&quot;; color: rgb(0, 32, 96);">Requirements:</span></p><p style="margin-bottom: 0.0001pt; line-height: 150%;" class="MsoNormal"><span style="font-size: 10pt; line-height: 150%; font-family: &quot;Arial&quot;,&quot;sans-serif&quot;; color: rgb(0, 32, 96);"><o:p></o:p></span></p><p style="margin-bottom: 0.0001pt; line-height: 150%;" class="MsoNormal"><span style="font-size: 10pt; line-height: 150%; font-family: &quot;Arial&quot;,&quot;sans-serif&quot;; color: rgb(0, 32, 96);">Qualifications/Experience:</span></p><p style="margin-bottom: 0.0001pt; line-height: 150%;" class="MsoNormal"><span style="font-size: 10pt; line-height: 150%; font-family: &quot;Arial&quot;,&quot;sans-serif&quot;; color: rgb(0, 32, 96);"><o:p></o:p></span></p><p style="margin-bottom: 0.0001pt; line-height: 150%;" class="MsoNormal"><span style="font-size: 10pt; line-height: 150%; font-family: &quot;Arial&quot;,&quot;sans-serif&quot;; color: rgb(0, 32, 96);">- BS in Electrical/Electronic Engineering.<o:p></o:p></span></p><p style="margin-bottom: 0.0001pt; line-height: 150%;" class="MsoNormal"><span style="font-size: 10pt; line-height: 150%; font-family: &quot;Arial&quot;,&quot;sans-serif&quot;; color: rgb(0, 32, 96);">- 3+ years of RF and test engineering experiences<o:p></o:p></span></p><p style="margin-bottom: 0.0001pt; line-height: 150%;" class="MsoNormal"><span style="font-size: 10pt; line-height: 150%; font-family: &quot;Arial&quot;,&quot;sans-serif&quot;; color: rgb(0, 32, 96);">- Knowledge in software programming &ndash; C and NI Labview<o:p></o:p></span></p><p style="margin-bottom: 0.0001pt; line-height: 150%;" class="MsoNormal"><span style="font-size: 10pt; line-height: 150%; font-family: &quot;Arial&quot;,&quot;sans-serif&quot;; color: rgb(0, 32, 96);">- Assertive attitude is preferred to give guidance to coach<o:p></o:p></span></p><p style="margin-bottom: 0.0001pt; line-height: 150%;" class="MsoNormal"><span style="font-size: 10pt; line-height: 150%; font-family: &quot;Arial&quot;,&quot;sans-serif&quot;; color: rgb(0, 32, 96);">technicians<o:p></o:p></span></p><p style="margin-bottom: 0.0001pt; line-height: 150%;" class="MsoNormal"><span style="font-size: 10pt; line-height: 150%; font-family: &quot;Arial&quot;,&quot;sans-serif&quot;; color: rgb(0, 32, 96);">- Highly independent and possess initiative and good interpersonal<o:p></o:p></span></p><p style="margin-bottom: 0.0001pt; line-height: 150%;" class="MsoNormal"><span style="font-size: 10pt; line-height: 150%; font-family: &quot;Arial&quot;,&quot;sans-serif&quot;; color: rgb(0, 32, 96);">and communication skills.<o:p></o:p></span></p><p style="margin-bottom: 0.0001pt; line-height: 150%;" class="MsoNormal"><span style="font-size: 10pt; line-height: 150%; font-family: &quot;Arial&quot;,&quot;sans-serif&quot;; color: rgb(0, 32, 96);">EE Technicians<o:p></o:p></span></p><p style="margin-bottom: 0.0001pt; line-height: 150%;" class="MsoNormal"><span style="font-size: 10pt; line-height: 150%; font-family: &quot;Arial&quot;,&quot;sans-serif&quot;; color: rgb(0, 32, 96);">Job Responsibilities:<o:p></o:p></span></p><p style="margin-bottom: 0.0001pt; line-height: 150%;" class="MsoNormal"><span style="font-size: 10pt; line-height: 150%; font-family: &quot;Arial&quot;,&quot;sans-serif&quot;; color: rgb(0, 32, 96);">- Assist engineers with conducting test activities in meeting<o:p></o:p></span></p><p style="margin-bottom: 0.0001pt; line-height: 150%;" class="MsoNormal"><span style="font-size: 10pt; line-height: 150%; font-family: &quot;Arial&quot;,&quot;sans-serif&quot;; color: rgb(0, 32, 96);">product submission deadlines<o:p></o:p></span></p><p style="margin-bottom: 0.0001pt; line-height: 150%;" class="MsoNormal"><span style="font-size: 10pt; line-height: 150%; font-family: &quot;Arial&quot;,&quot;sans-serif&quot;; color: rgb(0, 32, 96);">- Provide test system setup and technical support<o:p></o:p></span></p><p style="margin-bottom: 0.0001pt; line-height: 150%;" class="MsoNormal"><span style="font-size: 10pt; line-height: 150%; font-family: &quot;Arial&quot;,&quot;sans-serif&quot;; color: rgb(0, 32, 96);">- Track test progress and test effort status<o:p></o:p></span></p><p style="margin-bottom: 0.0001pt; line-height: 150%;" class="MsoNormal"><span style="font-size: 10pt; line-height: 150%; font-family: &quot;Arial&quot;,&quot;sans-serif&quot;; color: rgb(0, 32, 96);">Requirements:<o:p></o:p></span></p><p style="margin-bottom: 0.0001pt; line-height: 150%;" class="MsoNormal"><span style="font-size: 10pt; line-height: 150%; font-family: &quot;Arial&quot;,&quot;sans-serif&quot;; color: rgb(0, 32, 96);">Qualifications/Experience:<o:p></o:p></span></p><p style="margin-bottom: 0.0001pt; line-height: 150%;" class="MsoNormal"><span style="font-size: 10pt; line-height: 150%; font-family: &quot;Arial&quot;,&quot;sans-serif&quot;; color: rgb(0, 32, 96);">- Highly self-motivated.<o:p></o:p></span></p><p style="margin-bottom: 0.0001pt; line-height: 150%;" class="MsoNormal"><span style="font-size: 10pt; line-height: 150%; font-family: &quot;Arial&quot;,&quot;sans-serif&quot;; color: rgb(0, 32, 96);">- Possess the ability to analyse and troubleshoot.<o:p></o:p></span></p><p style="margin-bottom: 0.0001pt; line-height: 150%;" class="MsoNormal"><span style="font-size: 10pt; line-height: 150%; font-family: &quot;Arial&quot;,&quot;sans-serif&quot;; color: rgb(0, 32, 96);">- Possess a Diploma in Electronic.<o:p></o:p></span></p><p style="line-height: 150%;" class="MsoNormal"><span style="font-size: 10pt; line-height: 150%; font-family: &quot;Arial&quot;,&quot;sans-serif&quot;; color: rgb(0, 32, 96);">- Knowledge of RF and test engineering is an advantage.<o:p></o:p></span></p>]]></description>
<date>12/3/2009</date>
<time>11:00:00 AM</time>
<link>http://blog.8pixel.net/?view=plink&amp;id=202</link>
<id>202</id></item>
<item>
<title><![CDATA[Test Engineer/ Associate Engineer  (Freshers are welcome)]]></title>
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5.4pt;mso-para-margin:0in;mso-para-margin-bottom:.0001pt;mso-pagination:widow-orphan;font-size:10.0pt;font-family:"Times New Roman","serif";}</style><![endif]--><p><strong><span style="font-size: 11pt; font-family: &quot;Calibri&quot;,&quot;sans-serif&quot;; color: rgb(31, 73, 125);">You shod be a diploma holder in Electronic/ Electrical/ Mechanical or Mechatronics.<o:p></o:p></span></strong></p><p><span style="font-size: 11pt; font-family: &quot;Calibri&quot;,&quot;sans-serif&quot;; color: rgb(31, 73, 125);"><strong>Freshers are welcome. </strong><o:p></o:p></span></p><table cellspacing="0" cellpadding="0" border="0" style="border-collapse: collapse;" class="MsoNormalTable">    <tbody>        <tr style="">            <td valign="top" width="616" style="border: 1pt solid windowtext; padding: 0in 5.4pt; width: 462.25pt;">            <h1><span style="font-size: 10pt; font-family: &quot;Arial&quot;,&quot;sans-serif&quot;; color: rgb(0, 32, 96);">Beta Test Engineer<o:p></o:p></span></h1>            </td>        </tr>        <tr style="">            <td valign="top" width="616" style="border-style: none solid solid; border-color: -moz-use-text-color windowtext windowtext; border-width: medium 1pt 1pt; padding: 0in 5.4pt; width: 462.25pt;">            <h2><span style="font-size: 10pt; font-family: &quot;Arial&quot;,&quot;sans-serif&quot;; color: rgb(0, 32, 96);">Beta Testing &ndash;   Definition<o:p></o:p></span></h2>            <ul type="disc" style="margin-top: 0in;">                <li style="color: rgb(0, 32, 96);" class="MsoNormal"><span style="font-size: 10pt; font-family: &quot;Arial&quot;,&quot;sans-serif&quot;;">Validation of final product        based on defined user requirements.<o:p></o:p></span></li>                <li style="color: rgb(0, 32, 96);" class="MsoNormal"><span style="font-size: 10pt; font-family: &quot;Arial&quot;,&quot;sans-serif&quot;;">Testing activities that        involve &lsquo;near live&rsquo; environment and end-user scenarios.&nbsp; The focus        is not only on typical product usage but also to find bugs that can&rsquo;t be        or were not detected in earlier phases of system testing.<o:p></o:p></span></li>            </ul>            <p style="margin-left: 0.25in;" class="MsoNormal"><span style="font-size: 10pt; font-family: &quot;Arial&quot;,&quot;sans-serif&quot;; color: rgb(0, 32, 96);"><o:p>&nbsp;</o:p></span></p>            </td>        </tr>        <tr style="">            <td valign="top" width="616" style="border-style: none solid solid; border-color: -moz-use-text-color windowtext windowtext; border-width: medium 1pt 1pt; padding: 0in 5.4pt; width: 462.25pt;">            <h2><span style="font-size: 10pt; font-family: &quot;Arial&quot;,&quot;sans-serif&quot;; color: rgb(0, 32, 96);">Objective<o:p></o:p></span></h2>            <ul type="disc" style="margin-top: 0in;">                <li style="color: rgb(0, 32, 96);" class="MsoNormal"><span style="font-size: 10pt; font-family: &quot;Arial&quot;,&quot;sans-serif&quot;;">To execute validation and        acceptance tests<o:p></o:p></span></li>            </ul>            <p class="MsoNormal"><span style="font-size: 10pt; font-family: &quot;Arial&quot;,&quot;sans-serif&quot;; color: rgb(0, 32, 96);"><o:p>&nbsp;</o:p></span></p>            </td>        </tr>        <tr style="">            <td valign="top" width="616" style="border-style: none solid solid; border-color: -moz-use-text-color windowtext windowtext; border-width: medium 1pt 1pt; padding: 0in 5.4pt; width: 462.25pt;">            <h2><span style="font-size: 10pt; font-family: &quot;Arial&quot;,&quot;sans-serif&quot;; color: rgb(0, 32, 96);">Roles and   Responsibilities<o:p></o:p></span></h2>            <p class="MsoNormal"><span style="font-size: 10pt; font-family: &quot;Arial&quot;,&quot;sans-serif&quot;; color: rgb(0, 32, 96);"><o:p>&nbsp;</o:p></span></p>            <ul type="disc" style="margin-top: 0in;">                <li style="color: rgb(0, 32, 96);" class="MsoNormal"><span style="font-size: 10pt; font-family: &quot;Arial&quot;,&quot;sans-serif&quot;;">Performs testing according to        test specification<o:p></o:p></span></li>                <li style="color: rgb(0, 32, 96);" class="MsoNormal"><span style="font-size: 10pt; font-family: &quot;Arial&quot;,&quot;sans-serif&quot;;">Understands products,        features, compliance, project deliverables requirements through the        supervision of the Beta Test Lead<o:p></o:p></span></li>                <li style="color: rgb(0, 32, 96);" class="MsoNormal"><span style="font-size: 10pt; font-family: &quot;Arial&quot;,&quot;sans-serif&quot;;">Liaise with designers and        suppliers on defect tracking and fixes when necessary<o:p></o:p></span></li>                <li style="color: rgb(0, 32, 96);" class="MsoNormal"><span style="font-size: 10pt; font-family: &quot;Arial&quot;,&quot;sans-serif&quot;;">Effectively communicate        testing activities and findings in oral and written formats<o:p></o:p></span></li>                <li style="color: rgb(0, 32, 96);" class="MsoNormal"><span style="font-size: 10pt; font-family: &quot;Arial&quot;,&quot;sans-serif&quot;;">Participates in test        performance and process improvement activities.<o:p></o:p></span></li>            </ul>            <p style="margin-left: 0.25in;" class="MsoNormal"><span style="font-size: 10pt; font-family: &quot;Arial&quot;,&quot;sans-serif&quot;; color: rgb(0, 32, 96);"><o:p>&nbsp;</o:p></span></p>            </td>        </tr>        <tr style="">            <td valign="top" width="616" style="border-style: none solid solid; border-color: -moz-use-text-color windowtext windowtext; border-width: medium 1pt 1pt; padding: 0in 5.4pt; width: 462.25pt;">            <h2><span style="font-size: 10pt; font-family: &quot;Arial&quot;,&quot;sans-serif&quot;; color: rgb(0, 32, 96);">Reporting<o:p></o:p></span></h2>            <ul type="disc" style="margin-top: 0in;">                <li style="color: rgb(0, 32, 96);" class="MsoNormal"><span lang="EN-GB" style="font-size: 10pt; font-family: &quot;Arial&quot;,&quot;sans-serif&quot;;">Reports        to Beta Test Lead on project test progress and test status on fixed        interval</span><span style="font-size: 10pt; font-family: &quot;Arial&quot;,&quot;sans-serif&quot;;"><o:p></o:p></span></li>                <li style="color: rgb(0, 32, 96);" class="MsoNormal"><span style="font-size: 10pt; font-family: &quot;Arial&quot;,&quot;sans-serif&quot;;">Reports to SW Test Manager on        any test process and test performance issues<o:p></o:p></span></li>            </ul>            <p class="MsoNormal"><span style="font-size: 10pt; font-family: &quot;Arial&quot;,&quot;sans-serif&quot;; color: rgb(0, 32, 96);"><o:p>&nbsp;</o:p></span></p>            </td>        </tr>        <tr style="">            <td valign="top" width="616" style="border-style: none solid solid; border-color: -moz-use-text-color windowtext windowtext; border-width: medium 1pt 1pt; padding: 0in 5.4pt; width: 462.25pt;">            <h2><span style="font-size: 10pt; font-family: &quot;Arial&quot;,&quot;sans-serif&quot;; color: rgb(0, 32, 96);">Deliverables<o:p></o:p></span></h2>            <ul type="disc" style="margin-top: 0in;">                <li style="color: rgb(0, 32, 96);" class="MsoNormal"><span lang="EN-GB" style="font-size: 10pt; font-family: &quot;Arial&quot;,&quot;sans-serif&quot;;">Beta        Test Results </span><span style="font-size: 10pt; font-family: &quot;Arial&quot;,&quot;sans-serif&quot;;"><o:p></o:p></span></li>            </ul>            <p style="margin-left: 0.25in;" class="MsoNormal"><span style="font-size: 10pt; font-family: &quot;Arial&quot;,&quot;sans-serif&quot;; color: rgb(0, 32, 96);"><o:p>&nbsp;</o:p></span></p>            </td>        </tr>        <tr style="">            <td valign="top" width="616" style="border-style: none solid solid; border-color: -moz-use-text-color windowtext windowtext; border-width: medium 1pt 1pt; padding: 0in 5.4pt; width: 462.25pt;">            <h2><span style="font-size: 10pt; font-family: &quot;Arial&quot;,&quot;sans-serif&quot;; color: rgb(0, 32, 96);">Necessary Know-How /   Skills / Personality Characteristics<o:p></o:p></span></h2>            <ul type="disc" style="margin-top: 0in;">                <li style="color: rgb(0, 32, 96);" class="MsoNormal"><span style="font-size: 10pt; font-family: &quot;Arial&quot;,&quot;sans-serif&quot;;">Experience in product /        software testing<o:p></o:p></span></li>                <li style="color: rgb(0, 32, 96);" class="MsoNormal"><span style="font-size: 10pt; font-family: &quot;Arial&quot;,&quot;sans-serif&quot;;">Experience in working with        project teams<o:p></o:p></span></li>                <li style="color: rgb(0, 32, 96);" class="MsoNormal"><span style="font-size: 10pt; font-family: &quot;Arial&quot;,&quot;sans-serif&quot;;">Analytical,        creative, and abstract thinker</span><span style="font-size: 10pt; font-family: &quot;Arial&quot;,&quot;sans-serif&quot;;"><o:p></o:p></span></li>                <li style="color: rgb(0, 32, 96);" class="MsoNormal"><span style="font-size: 10pt; font-family: &quot;Arial&quot;,&quot;sans-serif&quot;;">Disciplined        team worker</span><span style="font-size: 10pt; font-family: &quot;Arial&quot;,&quot;sans-serif&quot;;"><o:p></o:p></span></li>                <li style="color: rgb(0, 32, 96);" class="MsoNormal"><span style="font-size: 10pt; font-family: &quot;Arial&quot;,&quot;sans-serif&quot;;">Accurate</span><span style="font-size: 10pt; font-family: &quot;Arial&quot;,&quot;sans-serif&quot;;"><o:p></o:p></span></li>            </ul>            </td>        </tr>    </tbody></table><p class="MsoNormal"><span style="font-size: 10pt; font-family: &quot;Arial&quot;,&quot;sans-serif&quot;; color: rgb(0, 32, 96);"><o:p>&nbsp;</o:p></span></p><p style="" class="MsoNormal"><span style="font-size: 10pt; font-family: &quot;Arial&quot;,&quot;sans-serif&quot;; color: rgb(0, 32, 96);"><o:p>&nbsp;</o:p></span></p><p><strong><span style="font-size: 10pt; font-family: &quot;Arial&quot;,&quot;sans-serif&quot;; color: rgb(0, 32, 96);">Please send your CV in a Word format to <a title="mailto:menusha@alpsoft-tech.com" target="_blank" href="mailto:menusha@alpsoft-tech.com"><span style="color: rgb(0, 32, 96);">menusha@alpsoft-tech.com</span></a> and mentions your current and expected salaries and earliest availability.</span></strong><span style="font-size: 10pt; font-family: &quot;Arial&quot;,&quot;sans-serif&quot;; color: rgb(0, 32, 96);"><o:p></o:p></span></p>]]></description>
<date>12/3/2009</date>
<time>10:53:00 AM</time>
<link>http://blog.8pixel.net/?view=plink&amp;id=201</link>
<id>201</id></item>
<item>
<title><![CDATA[Assistant System Engineer]]></title>
<description><![CDATA[<meta content="text/html; charset=utf-8" http-equiv="Content-Type" /><meta content="Word.Document" name="ProgId" /><meta content="Microsoft Word 11" name="Generator" /><meta content="Microsoft Word 11" name="Originator" /><link href="file:///C:\DOCUME~1\User\LOCALS~1\Temp\msohtml1\11\clip_filelist.xml" rel="File-List" /><!--[if gte mso 9]><xml><w:WordDocument><w:View>Normal</w:View><w:Zoom>0</w:Zoom><w:PunctuationKerning /><w:ValidateAgainstSchemas /><w:SaveIfXMLInvalid>false</w:SaveIfXMLInvalid><w:IgnoreMixedContent>false</w:IgnoreMixedContent><w:AlwaysShowPlaceholderText>false</w:AlwaysShowPlaceholderText><w:Compatibility><w:BreakWrappedTables /><w:SnapToGridInCell /><w:WrapTextWithPunct /><w:UseAsianBreakRules /><w:DontGrowAutofit /></w:Compatibility><w:BrowserLevel>MicrosoftInternetExplorer4</w:BrowserLevel></w:WordDocument></xml><![endif]--><!--[if gte mso 9]><xml><w:LatentStyles DefLockedState="false" LatentStyleCount="156"></w:LatentStyles></xml><![endif]--><style type="text/css"><!-- /* Style Definitions */ p.MsoNormal, li.MsoNormal, div.MsoNormal	{mso-style-parent:"";	margin:0in;	margin-bottom:.0001pt;	mso-pagination:widow-orphan;	font-size:12.0pt;	font-family:"Times New Roman";	mso-fareast-font-family:"Times New Roman";}a:link, span.MsoHyperlink	{color:blue;	text-decoration:underline;	text-underline:single;}a:visited, span.MsoHyperlinkFollowed	{color:purple;	text-decoration:underline;	text-underline:single;}@page Section1	{size:8.5in 11.0in;	margin:1.0in 1.25in 1.0in 1.25in;	mso-header-margin:.5in;	mso-footer-margin:.5in;	mso-paper-source:0;}div.Section1	{page:Section1;} /* List Definitions */ @list l0	{mso-list-id:668409421;	mso-list-template-ids:250098816;}ol	{margin-bottom:0in;}ul	{margin-bottom:0in;}--></style><!--[if gte mso 10]><style>/* Style Definitions */table.MsoNormalTable{mso-style-name:"Table Normal";mso-tstyle-rowband-size:0;mso-tstyle-colband-size:0;mso-style-noshow:yes;mso-style-parent:"";mso-padding-alt:0in 5.4pt 0in 5.4pt;mso-para-margin:0in;mso-para-margin-bottom:.0001pt;mso-pagination:widow-orphan;font-size:10.0pt;font-family:"Times New Roman";mso-ansi-language:#0400;mso-fareast-language:#0400;mso-bidi-language:#0400;}</style><![endif]--><p style="" class="MsoNormal"><span style="font-size: 10pt; font-family: Arial; color: maroon;">Job Description: <u1:p></u1:p></span><span style="color: maroon;"><o:p></o:p></span></p><p style="" class="MsoNormal"><span style="font-size: 10pt; font-family: Arial; color: maroon;"><u1:p>&nbsp;</u1:p></span><span style="color: maroon;"><o:p></o:p></span></p><p style="" class="MsoNormal"><span style="font-size: 10pt; font-family: Arial; color: maroon;">The Assistant System Engineer will be an integral part of the pre-sale System Engineering team in the Government and Public Safety (G&amp;PS) business unit providing technical and engineering support to the System Engineers which includes:</span><span style="color: maroon;"><u1:p></u1:p><o:p></o:p></span></p><p style="" class="MsoNormal"><span style="font-size: 10pt; font-family: Arial; color: maroon;"><u1:p>&nbsp;</u1:p></span><span style="color: maroon;"><o:p></o:p></span></p><p style="margin-left: 0.5in; text-indent: -0.25in;" class="MsoNormal"><span style="font-size: 10pt; font-family: Symbol; color: maroon;">&middot;</span><span style="font-size: 7pt; color: maroon;"><span style="font-size-adjust: none; font-stretch: normal;">&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; </span></span><span style="font-size: 10pt; font-family: Arial; color: maroon;">Performing RF coverage planning, traffic planning, frequency planning, and etc. using computerized simulation tool<u1:p></u1:p></span><span style="color: maroon;"><o:p></o:p></span></p><p style="margin-left: 0.5in; text-indent: -0.25in;" class="MsoNormal"><span style="font-size: 10pt; font-family: Symbol; color: maroon;">&middot;</span><span style="font-size: 7pt; color: maroon;"><span style="font-size-adjust: none; font-stretch: normal;">&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; </span></span><span style="font-size: 10pt; font-family: Arial; color: maroon;">Creating simple pre-sales equipment list for non-complex projects involving only subscriber radios</span><span style="color: maroon;"><u1:p></u1:p><o:p></o:p></span></p><p style="margin-left: 0.5in; text-indent: -0.25in;" class="MsoNormal"><span style="font-size: 10pt; font-family: Symbol; color: maroon;">&middot;</span><span style="font-size: 7pt; color: maroon;"><span style="font-size-adjust: none; font-stretch: normal;">&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; </span></span><span style="font-size: 10pt; font-family: Arial; color: maroon;">Generating orderable equipment list for contracted projects </span><span style="color: maroon;"><u1:p></u1:p><o:p></o:p></span></p><p style="margin-left: 0.5in; text-indent: -0.25in;" class="MsoNormal"><span style="font-size: 10pt; font-family: Symbol; color: maroon;">&middot;</span><span style="font-size: 7pt; color: maroon;"><span style="font-size-adjust: none; font-stretch: normal;">&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; </span></span><span style="font-size: 10pt; font-family: Arial; color: maroon;">Generating and maintaining orderable equipment list templates for subscribers radios and package systems such as Dimetra LiTE </span><span style="color: maroon;"><u1:p></u1:p><o:p></o:p></span></p><p style="margin-left: 0.5in; text-indent: -0.25in;" class="MsoNormal"><span style="font-size: 10pt; font-family: Symbol; color: maroon;">&middot;</span><span style="font-size: 7pt; color: maroon;"><span style="font-size-adjust: none; font-stretch: normal;">&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; </span></span><span style="font-size: 10pt; font-family: Arial; color: maroon;">Identifying and resolving Tech Edit issues during orderable equipment list generation </span><span style="color: maroon;"><u1:p></u1:p><o:p></o:p></span></p><p style="margin-left: 0.5in; text-indent: -0.25in;" class="MsoNormal"><span style="font-size: 10pt; font-family: Symbol; color: maroon;">&middot;</span><span style="font-size: 7pt; color: maroon;"><span style="font-size-adjust: none; font-stretch: normal;">&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; </span></span><span style="font-size: 10pt; font-family: Arial; color: maroon;">Assisting in proposal generation by creating professional engineering diagrams and templates, power sizing analysis, racking configurations, etc</span><span style="color: maroon;"><u1:p></u1:p><o:p></o:p></span></p><p style="margin-left: 0.5in; text-indent: -0.25in;" class="MsoNormal"><span style="font-size: 10pt; font-family: Symbol; color: maroon;">&middot;</span><span style="font-size: 7pt; color: maroon;"><span style="font-size-adjust: none; font-stretch: normal;">&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; </span></span><span style="font-size: 10pt; font-family: Arial; color: maroon;">Maintaining up-to-date software versions for coverage simulation tool and order entry tools</span><span style="color: maroon;"><u1:p></u1:p><o:p></o:p></span></p><p style="margin-left: 0.5in; text-indent: -0.25in;" class="MsoNormal"><span style="font-size: 10pt; font-family: Symbol; color: maroon;">&middot;</span><span style="font-size: 7pt; color: maroon;"><span style="font-size-adjust: none; font-stretch: normal;">&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; </span></span><span style="font-size: 10pt; font-family: Arial; color: maroon;">Generating RFQ for non-Motorola equipment such as UPS, generators, system back-up batteries, racks, etc.</span><span style="color: maroon;"><u1:p></u1:p><o:p></o:p></span></p><p style="margin-left: 0.5in; text-indent: -0.25in;" class="MsoNormal"><span style="font-size: 10pt; font-family: Symbol; color: maroon;">&middot;</span><span style="font-size: 7pt; color: maroon;"><span style="font-size-adjust: none; font-stretch: normal;">&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; </span></span><span style="font-size: 10pt; font-family: Arial; color: maroon;">Conducting RF coverage performance and survey at customer&rsquo;s operational area</span><span style="color: maroon;"><u1:p></u1:p><o:p></o:p></span></p><p style="" class="MsoNormal"><span style="font-size: 10pt; font-family: Arial; color: maroon;"><u1:p>&nbsp; Specific Knowledge/Skills: <u1:p></u1:p></u1:p></span><span style="color: maroon;"><o:p></o:p></span></p><p style="" class="MsoNormal"><span style="font-size: 10pt; font-family: Arial; color: maroon;"><u1:p>&nbsp;</u1:p></span><span style="color: maroon;"><o:p></o:p></span></p><ol type="1" start="1">    <li style="color: maroon;" class="MsoNormal"><span style="font-size: 10pt; font-family: Arial;">Diploma in Electrical or Electronics Engineering      or equivalent.<u1:p></u1:p></span> <o:p></o:p></li>    <li style="color: maroon;" class="MsoNormal"><span style="font-size: 10pt; font-family: Arial;">Good spoken and written communications skills.<u1:p></u1:p></span>      <o:p></o:p></li>    <li style="color: maroon;" class="MsoNormal"><span style="font-size: 10pt; font-family: Arial;">Good interpersonal skills.<u1:p></u1:p></span> <o:p></o:p></li>    <li style="color: maroon;" class="MsoNormal"><span style="font-size: 10pt; font-family: Arial;">Minimum 3-4 years experience in a relevant field      of telecommunications. Preference will be given to those with RF      engineering experience in areas of design and planning radio      communications.<u1:p></u1:p></span> <o:p></o:p></li>    <li style="color: maroon;" class="MsoNormal"><span style="font-size: 10pt; font-family: Arial;">Knowledgeable with Microsoft Word, Excel,      Powerpoint and Visio Professional.</span><u1:p></u1:p> <o:p></o:p></li>    <li style="color: maroon;" class="MsoNormal"><span style="font-size: 10pt; font-family: Arial;">Able to work independently on assigned projects.<u1:p></u1:p></span>      <o:p></o:p></li>    <li style="color: maroon;" class="MsoNormal"><span style="font-size: 10pt; font-family: Arial;">Some traveling (e.g. for coverage survey) may be      required.</span></li></ol><p class="MsoNormal"><strong><span style="font-size: 10pt; font-family: Arial; color: maroon;">Please send your CV in a Word format to <a title="mailto:menusha@alpsoft-tech.com" href="mailto:menusha@alpsoft-tech.com"><span style="color: maroon;"><span title="mailto:menusha@alpsoft-tech.com"><span title="mailto:menusha@alpsoft-tech.com">jobs@alpsoft-tech.com</span></span></span></a> and mentions your current and expected salaries and earliest availability.</span></strong><span style="color: maroon;"><o:p></o:p></span></p><strong><font face="Arial" size="2" color="maroon"><span style="font-weight: bold; font-size: 10pt; color: maroon; font-family: Arial;" /></font></strong>]]></description>
<date>7/30/2009</date>
<time>1:13:00 PM</time>
<link>http://blog.8pixel.net/?view=plink&amp;id=200</link>
<id>200</id></item>
<item>
<title><![CDATA[Mechanical Engineer-(Pro-E Wildfire 3)]]></title>
<description><![CDATA[<p class="MsoNormal" style="MARGIN: 0in 0in 0pt; LINE-HEIGHT: 150%"><strong style="mso-bidi-font-weight: normal"><span style="FONT-SIZE: 11pt; COLOR: navy; LINE-HEIGHT: 150%; FONT-FAMILY: Arial">Responsible<o:p></o:p></span></strong></p><p class="MsoNormal" style="MARGIN: 0in 0in 0pt; LINE-HEIGHT: 150%"><span style="FONT-SIZE: 10pt; COLOR: navy; LINE-HEIGHT: 150%; FONT-FAMILY: Arial"><o:p>&nbsp;</o:p></span></p><p class="MsoNormal" style="MARGIN: 0in 0in 0pt; LINE-HEIGHT: 150%"><span style="FONT-SIZE: 10pt; COLOR: navy; LINE-HEIGHT: 150%; FONT-FAMILY: Arial">Responsible for the new product (mobile phone) feasibility study included the product layout architectures, generate the overall design concept as well as detailed designed items with optimizing engineering design to provide competitive products, 3D CAD modeling for the complete product, design validation through calculation and stake up, cost estimation study, perform Potential Design Failure Mode Effect Analysis (DFMEA) with focus in design and manufacturing process, verification of design through prototyping and work closely with simulation team to validate the simulation failure.<o:p></o:p></span></p><p class="MsoNormal" style="MARGIN: 0in 0in 0pt; LINE-HEIGHT: 150%"><span style="FONT-SIZE: 10pt; COLOR: navy; LINE-HEIGHT: 150%; FONT-FAMILY: Arial"><o:p>&nbsp;</o:p></span></p><p class="MsoNormal" style="MARGIN: 0in 0in 0pt; LINE-HEIGHT: 150%"><strong><span style="FONT-SIZE: 11pt; COLOR: navy; LINE-HEIGHT: 150%; FONT-FAMILY: Arial">Requirements</span></strong><span style="FONT-SIZE: 11pt; COLOR: navy; LINE-HEIGHT: 150%; FONT-FAMILY: Arial">:<o:p></o:p></span></p><p class="MsoNormal" style="MARGIN: 0in 0in 0pt; LINE-HEIGHT: 150%"><span style="FONT-SIZE: 10pt; COLOR: navy; LINE-HEIGHT: 150%; FONT-FAMILY: Arial"><o:p>&nbsp;</o:p></span></p><p class="MsoNormal" style="MARGIN: 0in 0in 0pt; LINE-HEIGHT: 150%"><strong style="mso-bidi-font-weight: normal"><span style="FONT-SIZE: 10pt; COLOR: navy; LINE-HEIGHT: 150%; FONT-FAMILY: Arial">Education background :</span></strong><span style="FONT-SIZE: 10pt; COLOR: navy; LINE-HEIGHT: 150%; FONT-FAMILY: Arial">&nbsp;&nbsp;degree or diploma holder with <strong>at</strong> <strong style="mso-bidi-font-weight: normal">least four years of design</strong> experience in <strong style="mso-bidi-font-weight: normal">Pro-E</strong></span></p><p class="MsoNormal" style="MARGIN: 0in 0in 0pt; LINE-HEIGHT: 150%"><span style="FONT-SIZE: 10pt; COLOR: navy; LINE-HEIGHT: 150%; FONT-FAMILY: Arial"><strong></strong><o:p></o:p></span></p><p class="MsoNormal" style="MARGIN: 0in 0in 0pt; LINE-HEIGHT: 150%"><strong style="mso-bidi-font-weight: normal"><span style="FONT-SIZE: 10pt; COLOR: navy; LINE-HEIGHT: 150%; FONT-FAMILY: Arial">Experience :</span></strong><span style="FONT-SIZE: 10pt; COLOR: navy; LINE-HEIGHT: 150%; FONT-FAMILY: Arial"> proficient in Plastic, Metal, or Rubber part design and understand DFA concept<o:p></o:p></span></p><p class="MsoNormal" style="MARGIN: 0in 0in 0pt; LINE-HEIGHT: 150%"><span style="FONT-SIZE: 10pt; COLOR: navy; LINE-HEIGHT: 150%; FONT-FAMILY: Arial">CAD experience : <strong style="mso-bidi-font-weight: normal">proficient in Pro-E wildfire 3</strong>.<o:p></o:p></span></p><p class="MsoNormal" style="MARGIN: 0in 0in 0pt; LINE-HEIGHT: 150%"><span style="FONT-SIZE: 10pt; COLOR: navy; LINE-HEIGHT: 150%; FONT-FAMILY: Arial"><o:p>&nbsp;</o:p></span></p><p class="MsoNormal" style="MARGIN: 0in 0in 0pt; LINE-HEIGHT: 150%; TEXT-ALIGN: center" align="center"><span style="FONT-SIZE: 10pt; COLOR: navy; LINE-HEIGHT: 150%; FONT-FAMILY: Arial">Please send resume in WORD form to <strong>jobs@alpsoft-tech.com </strong>Kindly include PHOTO, CURRENT &amp; EXPECTED Salary &amp; Availability DATE We regret that only short listed candidates will be notified. Website: www.alpsoft-tech.com<o:p></o:p></span></p>]]></description>
<date>5/28/2009</date>
<time>1:08:00 PM</time>
<link>http://blog.8pixel.net/?view=plink&amp;id=199</link>
<id>199</id></item>
<item>
<title><![CDATA[Senior Structural Engineer / Structural Engineer]]></title>
<description><![CDATA[<p class="MsoTitle" style="MARGIN: 9pt 0in 3pt"><strong><span lang="EN-AU" style="COLOR: navy; FONT-FAMILY: Arial; mso-ansi-language: EN-AU"><font size="2">Senior Structural Engineer / Structural Engineer<o:p></o:p></font></span></strong></p><p class="MsoNormal" style="MARGIN: 0in 0in 0pt"><strong><span style="FONT-SIZE: 10pt; COLOR: navy; FONT-FAMILY: Arial"><o:p>&nbsp;</o:p></span></strong></p><p class="MsoNormal" style="MARGIN: 0in 0in 0pt"><strong><span style="FONT-SIZE: 10pt; COLOR: navy; FONT-FAMILY: Arial">Description<o:p></o:p></span></strong></p><p class="MsoNormal" style="MARGIN: 0in 0in 0pt"><span style="FONT-SIZE: 10pt; COLOR: navy; FONT-FAMILY: Arial"><o:p>&nbsp;</o:p></span></p><p class="MsoNormal" style="MARGIN: 0in 0in 0pt"><span style="FONT-SIZE: 10pt; COLOR: navy; FONT-FAMILY: Arial"><o:p>&nbsp;</o:p></span></p><p class="MsoNormal" style="MARGIN: 0in 0in 0pt"><span style="FONT-SIZE: 10pt; COLOR: navy; FONT-FAMILY: Arial">Prepare designs, sketches and reports with supporting calculations for projects, and supply drafting staff with information to assist in the production of detailed drawings, the development of quantities, materials lists and cost estimates as required<o:p></o:p></span></p><p class="MsoNormal" style="MARGIN: 0in 0in 0pt"><span style="FONT-SIZE: 10pt; COLOR: navy; FONT-FAMILY: Arial"><o:p>&nbsp;</o:p></span></p><p class="MsoNormal" style="MARGIN: 0in 0in 0pt"><span style="FONT-SIZE: 10pt; COLOR: navy; FONT-FAMILY: Arial">Assist in the preparation of technical detail for quotations, contract documentation and technical specifications<o:p></o:p></span></p><p class="MsoNormal" style="MARGIN: 0in 0in 0pt"><span style="FONT-SIZE: 10pt; COLOR: navy; FONT-FAMILY: Arial"><o:p>&nbsp;</o:p></span></p><p class="MsoNormal" style="MARGIN: 0in 0in 0pt"><span style="FONT-SIZE: 10pt; COLOR: navy; FONT-FAMILY: Arial">Liaise with suppliers, clients, consultants or commissioning engineers concerning the design, installation or construction and commissioning of assigned work<o:p></o:p></span></p><p class="MsoNormal" style="MARGIN: 0in 0in 12pt"><span style="FONT-SIZE: 10pt; COLOR: navy; FONT-FAMILY: Arial">Participate in the planning of projects as required<br /><br />The successful candidate will have:<o:p></o:p></span></p><p class="MsoNormal" style="MARGIN: 0in 0in 0pt"><span style="FONT-SIZE: 10pt; COLOR: navy; FONT-FAMILY: Arial">Tertiary qualifications, (Bachelor of Engineering &ndash; Civil/Structural) with relevant experience <o:p></o:p></span></p><p class="MsoNormal" style="MARGIN: 0in 0in 0pt"><span style="FONT-SIZE: 10pt; COLOR: navy; FONT-FAMILY: Arial"><o:p>&nbsp;</o:p></span></p><p class="MsoNormal" style="MARGIN: 0in 0in 0pt"><span style="FONT-SIZE: 10pt; COLOR: navy; FONT-FAMILY: Arial">Technical skills in general civil/structural design for public infrastructure such underground MRT stations will be an advantage. <o:p></o:p></span></p><p class="MsoNormal" style="MARGIN: 0in 0in 0pt"><span style="FONT-SIZE: 10pt; COLOR: navy; FONT-FAMILY: Arial"><o:p>&nbsp;</o:p></span></p><p class="MsoNormal" style="MARGIN: 0in 0in 12pt"><span style="FONT-SIZE: 10pt; COLOR: navy; FONT-FAMILY: Arial">Eligible for registering as Professional Engineer in <st1:country-region w:st="on"><st1:place w:st="on">Singapore</st1:place></st1:country-region>.<o:p></o:p></span></p><p class="MsoNormal" style="MARGIN: 0in 0in 0pt"><span style="FONT-SIZE: 10pt; COLOR: navy; FONT-FAMILY: Arial">Please send your CV in a Word format to <a href="mailto:jobs@alpsoft-tech.com" ymailto="mailto:jobs%40genovate.com">jobs@alpsoft-tech.com</a> mentions your current and expected salaries and earliest availability.</span></p>]]></description>
<date>5/20/2009</date>
<time>12:46:00 PM</time>
<link>http://blog.8pixel.net/?view=plink&amp;id=198</link>
<id>198</id></item>
<item>
<title><![CDATA[Lead Geotechnical Engineer / Senior Geotechnical Engineer]]></title>
<description><![CDATA[<table style="WIDTH: 473.4pt; BORDER-COLLAPSE: collapse" cellspacing="0" cellpadding="0" width="631" border="0" class="MsoTableGrid">    <tbody>        <tr style="HEIGHT: 20.6pt" height="27">            <td style="PADDING-RIGHT: 5.4pt; PADDING-LEFT: 5.4pt; PADDING-BOTTOM: 0in; WIDTH: 1.2in; PADDING-TOP: 0in; HEIGHT: 20.6pt" valign="top" width="115" height="27">            <p class="MsoNormal" style="MARGIN-TOP: 3pt"><strong><font face="Arial" color="#000080" size="3"><span style="FONT-WEIGHT: bold; FONT-SIZE: 12pt; COLOR: navy; FONT-FAMILY: Arial">Title:<o:p></o:p></span></font></strong></p>            </td>            <td style="PADDING-RIGHT: 5.4pt; PADDING-LEFT: 5.4pt; PADDING-BOTTOM: 0in; WIDTH: 387pt; PADDING-TOP: 0in; HEIGHT: 20.6pt" valign="top" width="516" height="27">            <p class="MsoTitle"><strong><font face="Arial" color="#000080" size="3"><span lang="EN-AU" style="FONT-WEIGHT: bold; FONT-SIZE: 12pt; COLOR: navy; FONT-FAMILY: Arial">Lead Geotechnical Engineer<o:p></o:p></span></font></strong></p>            </td>        </tr>        <tr style="HEIGHT: 45.35pt" height="60">            <td style="PADDING-RIGHT: 5.4pt; PADDING-LEFT: 5.4pt; PADDING-BOTTOM: 0in; WIDTH: 1.2in; PADDING-TOP: 0in; HEIGHT: 45.35pt" valign="top" width="115" height="60">            <p class="MsoNormal" style="MARGIN-TOP: 3pt"><strong><font face="Arial" color="#000080" size="2"><span style="FONT-WEIGHT: bold; FONT-SIZE: 10pt; COLOR: navy; FONT-FAMILY: Arial">Requirements:<o:p></o:p></span></font></strong></p>            </td>            <td style="PADDING-RIGHT: 5.4pt; PADDING-LEFT: 5.4pt; PADDING-BOTTOM: 0in; WIDTH: 387pt; PADDING-TOP: 0in; HEIGHT: 45.35pt" valign="top" width="516" height="60">            <p class="MsoNormal" style="MARGIN-BOTTOM: 5pt; MARGIN-LEFT: 12.6pt; TEXT-INDENT: -13.5pt; MARGIN-RIGHT: 0in; TEXT-ALIGN: justify; mso-margin-top-alt: 5.0pt; mso-list: l0 level1 lfo3"><font face="Symbol" color="#000080" size="2"><span style="FONT-SIZE: 10pt; COLOR: navy; FONT-FAMILY: Symbol"><span style="mso-list: Ignore">&middot;<font face="Times New Roman" size="1"><span style="FONT: 7pt 'Times New Roman'">&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; </span></font></span></span></font><font face="Arial" color="#000080" size="2"><span style="FONT-SIZE: 10pt; COLOR: navy; FONT-FAMILY: Arial">Bachelor&rsquo;s Degree in Civil Engineering / Geology<o:p></o:p></span></font></p>            <p class="MsoNormal" style="MARGIN-BOTTOM: 5pt; MARGIN-LEFT: 12.6pt; TEXT-INDENT: -13.5pt; MARGIN-RIGHT: 0in; TEXT-ALIGN: justify; mso-margin-top-alt: 5.0pt; mso-list: l0 level1 lfo3"><font face="Symbol" color="#000080" size="2"><span style="FONT-SIZE: 10pt; COLOR: navy; FONT-FAMILY: Symbol"><span style="mso-list: Ignore">&middot;<font face="Times New Roman" size="1"><span style="FONT: 7pt 'Times New Roman'">&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; </span></font></span></span></font><font face="Arial" color="#000080" size="2"><span style="FONT-SIZE: 10pt; COLOR: navy; FONT-FAMILY: Arial">Masters Degree in Geotechnical Engineering / Engineering Geology<o:p></o:p></span></font></p>            <p class="MsoNormal" style="MARGIN-BOTTOM: 5pt; MARGIN-LEFT: 12.6pt; TEXT-INDENT: -13.5pt; MARGIN-RIGHT: 0in; TEXT-ALIGN: justify; mso-margin-top-alt: 5.0pt; mso-list: l0 level1 lfo3"><font face="Symbol" color="#000080" size="2"><span style="FONT-SIZE: 10pt; COLOR: navy; FONT-FAMILY: Symbol"><span style="mso-list: Ignore">&middot;<font face="Times New Roman" size="1"><span style="FONT: 7pt 'Times New Roman'">&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; </span></font></span></span></font><font face="Arial" color="#000080" size="2"><span style="FONT-SIZE: 10pt; COLOR: navy; FONT-FAMILY: Arial">Minimum 10 years relevant experience in design of foundations, excavations, slopes retaining walls and the like for heavy industrial plants or public infrastructure<o:p></o:p></span></font></p>            <p class="MsoNormal" style="MARGIN-BOTTOM: 5pt; MARGIN-LEFT: 12.6pt; TEXT-INDENT: -13.5pt; MARGIN-RIGHT: 0in; TEXT-ALIGN: justify; mso-margin-top-alt: 5.0pt; mso-list: l0 level1 lfo3"><font face="Symbol" color="#000080" size="2"><span style="FONT-SIZE: 10pt; COLOR: navy; FONT-FAMILY: Symbol"><span style="mso-list: Ignore">&middot;<font face="Times New Roman" size="1"><span style="FONT: 7pt 'Times New Roman'">&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; </span></font></span></span></font><font face="Arial" color="#000080" size="2"><span style="FONT-SIZE: 10pt; COLOR: navy; FONT-FAMILY: Arial">Experienced in specification and interpretation of site investigation and the assignment of geotechnical design parameters<o:p></o:p></span></font></p>            <p class="MsoNormal" style="MARGIN-BOTTOM: 5pt; MARGIN-LEFT: 12.6pt; TEXT-INDENT: -13.5pt; MARGIN-RIGHT: 0in; TEXT-ALIGN: justify; mso-margin-top-alt: 5.0pt; mso-list: l0 level1 lfo3"><font face="Symbol" color="#000080" size="2"><span style="FONT-SIZE: 10pt; COLOR: navy; FONT-FAMILY: Symbol"><span style="mso-list: Ignore">&middot;<font face="Times New Roman" size="1"><span style="FONT: 7pt 'Times New Roman'">&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; </span></font></span></span></font><font face="Arial" color="#000080" size="2"><span style="FONT-SIZE: 10pt; COLOR: navy; FONT-FAMILY: Arial">Experienced in the preparation of design reports, detailed drawings, specifications and contract documents<o:p></o:p></span></font></p>            <p class="MsoNormal" style="MARGIN-BOTTOM: 5pt; MARGIN-LEFT: 12.6pt; TEXT-INDENT: -13.5pt; MARGIN-RIGHT: 0in; TEXT-ALIGN: justify; mso-margin-top-alt: 5.0pt; mso-list: l0 level1 lfo3"><font face="Symbol" color="#000080" size="2"><span style="FONT-SIZE: 10pt; COLOR: navy; FONT-FAMILY: Symbol"><span style="mso-list: Ignore">&middot;<font face="Times New Roman" size="1"><span style="FONT: 7pt 'Times New Roman'">&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; </span></font></span></span></font><font face="Arial" color="#000080" size="2"><span style="FONT-SIZE: 10pt; COLOR: navy; FONT-FAMILY: Arial">Registered Professional Engineer in <st1:country-region w:st="on"><st1:place w:st="on">Singapore</st1:place></st1:country-region> and in-depth experience of PLAXIS or similar geotechnical finite element analysis software would be advantageous<o:p></o:p></span></font></p>            <p class="MsoNormal" style="MARGIN-LEFT: -0.9pt"><font face="Arial" color="#000080" size="2"><span style="FONT-SIZE: 10pt; COLOR: navy; FONT-FAMILY: Arial"><o:p>&nbsp;</o:p></span></font></p>            </td>        </tr>        <tr style="HEIGHT: 121.85pt" height="162">            <td style="PADDING-RIGHT: 5.4pt; PADDING-LEFT: 5.4pt; PADDING-BOTTOM: 0in; WIDTH: 1.2in; PADDING-TOP: 0in; HEIGHT: 121.85pt" valign="top" width="115" height="162">            <p class="MsoNormal" style="MARGIN-TOP: 3pt"><strong><font face="Arial" color="#000080" size="2"><span style="FONT-WEIGHT: bold; FONT-SIZE: 10pt; COLOR: navy; FONT-FAMILY: Arial">Duties and Responsibilities:<o:p></o:p></span></font></strong></p>            <p class="MsoNormal" style="MARGIN-TOP: 3pt"><font face="Arial" color="#000080" size="2"><span style="FONT-SIZE: 10pt; COLOR: navy; FONT-FAMILY: Arial"><o:p>&nbsp;</o:p></span></font></p>            </td>            <td style="PADDING-RIGHT: 5.4pt; PADDING-LEFT: 5.4pt; PADDING-BOTTOM: 0in; WIDTH: 387pt; PADDING-TOP: 0in; HEIGHT: 121.85pt" valign="top" width="516" height="162">            <p class="MsoNormal" style="MARGIN-BOTTOM: 5pt; MARGIN-LEFT: 12.6pt; TEXT-INDENT: -13.5pt; MARGIN-RIGHT: 0in; TEXT-ALIGN: justify; mso-margin-top-alt: 5.0pt; mso-list: l0 level1 lfo3"><font face="Symbol" color="#000080" size="2"><span style="FONT-SIZE: 10pt; COLOR: navy; FONT-FAMILY: Symbol"><span style="mso-list: Ignore">&middot;<font face="Times New Roman" size="1"><span style="FONT: 7pt 'Times New Roman'">&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; </span></font></span></span></font><font face="Arial" color="#000080" size="2"><span style="FONT-SIZE: 10pt; COLOR: navy; FONT-FAMILY: Arial">Required to work across the full range of industry sectors particularly on transportation, industrial, building and marine projects <o:p></o:p></span></font></p>            <p class="MsoNormal" style="MARGIN-BOTTOM: 5pt; MARGIN-LEFT: 12.6pt; TEXT-INDENT: -13.5pt; MARGIN-RIGHT: 0in; TEXT-ALIGN: justify; mso-margin-top-alt: 5.0pt; mso-list: l0 level1 lfo3"><font face="Symbol" color="#000080" size="2"><span style="FONT-SIZE: 10pt; COLOR: navy; FONT-FAMILY: Symbol"><span style="mso-list: Ignore">&middot;<font face="Times New Roman" size="1"><span style="FONT: 7pt 'Times New Roman'">&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; </span></font></span></span></font><font face="Arial" color="#000080" size="2"><span style="FONT-SIZE: 10pt; COLOR: navy; FONT-FAMILY: Arial">Responsible for liaising with clients and other consultants and for the technical delivery of projects<o:p></o:p></span></font></p>            <p class="MsoNormal" style="MARGIN-BOTTOM: 5pt; MARGIN-LEFT: 12.6pt; TEXT-INDENT: -13.5pt; MARGIN-RIGHT: 0in; TEXT-ALIGN: justify; mso-margin-top-alt: 5.0pt; mso-list: l0 level1 lfo3"><font face="Symbol" color="#000080" size="2"><span style="FONT-SIZE: 10pt; COLOR: navy; FONT-FAMILY: Symbol"><span style="mso-list: Ignore">&middot;<font face="Times New Roman" size="1"><span style="FONT: 7pt 'Times New Roman'">&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; </span></font></span></span></font><font face="Arial" color="#000080" size="2"><span style="FONT-SIZE: 10pt; COLOR: navy; FONT-FAMILY: Arial">Oversee a team of 5 to 10 engineers and draftspersons<o:p></o:p></span></font></p>            <p class="MsoNormal" style="MARGIN-BOTTOM: 5pt; MARGIN-LEFT: 12.6pt; TEXT-INDENT: -13.5pt; MARGIN-RIGHT: 0in; TEXT-ALIGN: justify; mso-margin-top-alt: 5.0pt; mso-list: l0 level1 lfo3"><font face="Symbol" color="#000080" size="2"><span style="FONT-SIZE: 10pt; COLOR: navy; FONT-FAMILY: Symbol"><span style="mso-list: Ignore">&middot;<font face="Times New Roman" size="1"><span style="FONT: 7pt 'Times New Roman'">&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; </span></font></span></span></font><font face="Arial" color="#000080" size="2"><span style="FONT-SIZE: 10pt; COLOR: navy; FONT-FAMILY: Arial">Carry out geotechnical design using appropriate finite element and other commercial software, spreadsheet applications and manual calculations in accordance with local and international standards and codes of practice<o:p></o:p></span></font></p>            <p class="MsoNormal" style="MARGIN-BOTTOM: 5pt; MARGIN-LEFT: 12.6pt; TEXT-INDENT: -13.5pt; MARGIN-RIGHT: 0in; TEXT-ALIGN: justify; mso-margin-top-alt: 5.0pt; mso-list: l0 level1 lfo3"><font face="Symbol" color="#000080" size="2"><span style="FONT-SIZE: 10pt; COLOR: navy; FONT-FAMILY: Symbol"><span style="mso-list: Ignore">&middot;<font face="Times New Roman" size="1"><span style="FONT: 7pt 'Times New Roman'">&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; </span></font></span></span></font><font face="Arial" color="#000080" size="2"><span style="FONT-SIZE: 10pt; COLOR: navy; FONT-FAMILY: Arial">Ensure implementation and practice of personal safety and safe working practices in accordance with WorleyParsons OH&amp;S procedures within the team <o:p></o:p></span></font></p>            <p class="MsoNormal" style="MARGIN-BOTTOM: 5pt; MARGIN-LEFT: 12.6pt; TEXT-INDENT: -13.5pt; MARGIN-RIGHT: 0in; TEXT-ALIGN: justify; mso-margin-top-alt: 5.0pt; mso-list: l0 level1 lfo3"><font face="Symbol" color="#000080" size="2"><span style="FONT-SIZE: 10pt; COLOR: navy; FONT-FAMILY: Symbol"><span style="mso-list: Ignore">&middot;<font face="Times New Roman" size="1"><span style="FONT: 7pt 'Times New Roman'">&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; </span></font></span></span></font><font face="Arial" color="#000080" size="2"><span style="FONT-SIZE: 10pt; COLOR: navy; FONT-FAMILY: Arial">Ensure technical integrity of the geotechnical deliverables within the provisions and guidelines of the WorleyParsons Quality Assurance system<o:p></o:p></span></font></p>            <p class="MsoNormal" style="MARGIN-BOTTOM: 5pt; MARGIN-LEFT: -0.9pt; MARGIN-RIGHT: 0in; TEXT-ALIGN: justify; mso-margin-top-alt: 5.0pt"><font face="Arial" color="#000080" size="2"><span style="FONT-SIZE: 10pt; COLOR: navy; FONT-FAMILY: Arial"><o:p>&nbsp;</o:p></span></font></p>            </td>        </tr>    </tbody></table><h2 style="MARGIN: 0in 0in 0pt"><strong><em><font face="Arial" color="#000080" size="2"><span style="FONT-SIZE: 10pt; COLOR: navy"><o:p>&nbsp;</o:p></span></font></em></strong></h2><h2 style="MARGIN: 0in 0in 0pt"><strong><em><font face="Arial" color="#000080" size="2"><span style="FONT-SIZE: 10pt; COLOR: navy"><o:p>&nbsp;</o:p></span></font></em></strong></h2><table style="WIDTH: 473.4pt; BORDER-COLLAPSE: collapse" cellspacing="0" cellpadding="0" width="631" border="0" class="MsoTableGrid">    <tbody>        <tr style="HEIGHT: 20.6pt" height="27">            <td style="PADDING-RIGHT: 5.4pt; PADDING-LEFT: 5.4pt; PADDING-BOTTOM: 0in; WIDTH: 1.2in; PADDING-TOP: 0in; HEIGHT: 20.6pt" valign="top" width="115" height="27">            <p class="MsoNormal" style="MARGIN-TOP: 3pt"><strong><font face="Arial" color="#000080" size="3"><span style="FONT-WEIGHT: bold; FONT-SIZE: 12pt; COLOR: navy; FONT-FAMILY: Arial">Title:<o:p></o:p></span></font></strong></p>            </td>            <td style="PADDING-RIGHT: 5.4pt; PADDING-LEFT: 5.4pt; PADDING-BOTTOM: 0in; WIDTH: 387pt; PADDING-TOP: 0in; HEIGHT: 20.6pt" valign="top" width="516" height="27">            <p class="MsoTitle"><strong><font face="Arial" color="#000080" size="3"><span lang="EN-AU" style="FONT-WEIGHT: bold; FONT-SIZE: 12pt; COLOR: navy; FONT-FAMILY: Arial">Senior Geotechnical Engineer<o:p></o:p></span></font></strong></p>            </td>        </tr>        <tr style="HEIGHT: 45.35pt" height="60">            <td style="PADDING-RIGHT: 5.4pt; PADDING-LEFT: 5.4pt; PADDING-BOTTOM: 0in; WIDTH: 1.2in; PADDING-TOP: 0in; HEIGHT: 45.35pt" valign="top" width="115" height="60">            <p class="MsoNormal" style="MARGIN-TOP: 3pt"><strong><font face="Arial" color="#000080" size="2"><span style="FONT-WEIGHT: bold; FONT-SIZE: 10pt; COLOR: navy; FONT-FAMILY: Arial">Requirements:<o:p></o:p></span></font></strong></p>            </td>            <td style="PADDING-RIGHT: 5.4pt; PADDING-LEFT: 5.4pt; PADDING-BOTTOM: 0in; WIDTH: 387pt; PADDING-TOP: 0in; HEIGHT: 45.35pt" valign="top" width="516" height="60">            <p class="MsoNormal" style="MARGIN-BOTTOM: 5pt; MARGIN-LEFT: 12.6pt; TEXT-INDENT: -13.5pt; MARGIN-RIGHT: 0in; TEXT-ALIGN: justify; mso-margin-top-alt: 5.0pt; mso-list: l0 level1 lfo3"><font face="Symbol" color="#000080" size="2"><span style="FONT-SIZE: 10pt; COLOR: navy; FONT-FAMILY: Symbol"><span style="mso-list: Ignore">&middot;<font face="Times New Roman" size="1"><span style="FONT: 7pt 'Times New Roman'">&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; </span></font></span></span></font><font face="Arial" color="#000080" size="2"><span style="FONT-SIZE: 10pt; COLOR: navy; FONT-FAMILY: Arial">Bachelor&rsquo;s Degree in Civil Engineering / Geology<o:p></o:p></span></font></p>            <p class="MsoNormal" style="MARGIN-BOTTOM: 5pt; MARGIN-LEFT: 12.6pt; TEXT-INDENT: -13.5pt; MARGIN-RIGHT: 0in; TEXT-ALIGN: justify; mso-margin-top-alt: 5.0pt; mso-list: l0 level1 lfo3"><font face="Symbol" color="#000080" size="2"><span style="FONT-SIZE: 10pt; COLOR: navy; FONT-FAMILY: Symbol"><span style="mso-list: Ignore">&middot;<font face="Times New Roman" size="1"><span style="FONT: 7pt 'Times New Roman'">&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; </span></font></span></span></font><font face="Arial" color="#000080" size="2"><span style="FONT-SIZE: 10pt; COLOR: navy; FONT-FAMILY: Arial">Masters Degree in Geotechnical Engineering / Engineering Geology<o:p></o:p></span></font></p>            <p class="MsoNormal" style="MARGIN-BOTTOM: 5pt; MARGIN-LEFT: 12.6pt; TEXT-INDENT: -13.5pt; MARGIN-RIGHT: 0in; TEXT-ALIGN: justify; mso-margin-top-alt: 5.0pt; mso-list: l0 level1 lfo3"><font face="Symbol" color="#000080" size="2"><span style="FONT-SIZE: 10pt; COLOR: navy; FONT-FAMILY: Symbol"><span style="mso-list: Ignore">&middot;<font face="Times New Roman" size="1"><span style="FONT: 7pt 'Times New Roman'">&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; </span></font></span></span></font><font face="Arial" color="#000080" size="2"><span style="FONT-SIZE: 10pt; COLOR: navy; FONT-FAMILY: Arial">Minimum 5 years relevant experience in design of foundations, excavations, slopes, retaining walls and the like for heavy industrial plants or public infrastructure<o:p></o:p></span></font></p>            <p class="MsoNormal" style="MARGIN-BOTTOM: 5pt; MARGIN-LEFT: 12.6pt; TEXT-INDENT: -13.5pt; MARGIN-RIGHT: 0in; TEXT-ALIGN: justify; mso-margin-top-alt: 5.0pt; mso-list: l0 level1 lfo3"><font face="Symbol" color="#000080" size="2"><span style="FONT-SIZE: 10pt; COLOR: navy; FONT-FAMILY: Symbol"><span style="mso-list: Ignore">&middot;<font face="Times New Roman" size="1"><span style="FONT: 7pt 'Times New Roman'">&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; </span></font></span></span></font><font face="Arial" color="#000080" size="2"><span style="FONT-SIZE: 10pt; COLOR: navy; FONT-FAMILY: Arial">In depth experience of PLAXIS or similar geotechnical finite element analysis software would be advantageous<o:p></o:p></span></font></p>            <p class="MsoNormal" style="MARGIN-LEFT: -0.9pt"><font face="Arial" color="#000080" size="2"><span style="FONT-SIZE: 10pt; COLOR: navy; FONT-FAMILY: Arial"><o:p>&nbsp;</o:p></span></font></p>            </td>        </tr>        <tr style="HEIGHT: 121.85pt" height="162">            <td style="PADDING-RIGHT: 5.4pt; PADDING-LEFT: 5.4pt; PADDING-BOTTOM: 0in; WIDTH: 1.2in; PADDING-TOP: 0in; HEIGHT: 121.85pt" valign="top" width="115" height="162">            <p class="MsoNormal" style="MARGIN-TOP: 3pt"><strong><font face="Arial" color="#000080" size="2"><span style="FONT-WEIGHT: bold; FONT-SIZE: 10pt; COLOR: navy; FONT-FAMILY: Arial">Duties and Responsibilities:<o:p></o:p></span></font></strong></p>            <p class="MsoNormal" style="MARGIN-TOP: 3pt"><font face="Arial" color="#000080" size="2"><span style="FONT-SIZE: 10pt; COLOR: navy; FONT-FAMILY: Arial"><o:p>&nbsp;</o:p></span></font></p>            </td>            <td style="PADDING-RIGHT: 5.4pt; PADDING-LEFT: 5.4pt; PADDING-BOTTOM: 0in; WIDTH: 387pt; PADDING-TOP: 0in; HEIGHT: 121.85pt" valign="top" width="516" height="162">            <p class="MsoNormal" style="MARGIN-BOTTOM: 5pt; MARGIN-LEFT: 12.6pt; TEXT-INDENT: -13.5pt; MARGIN-RIGHT: 0in; TEXT-ALIGN: justify; mso-margin-top-alt: 5.0pt; mso-list: l0 level1 lfo3"><font face="Symbol" color="#000080" size="2"><span style="FONT-SIZE: 10pt; COLOR: navy; FONT-FAMILY: Symbol"><span style="mso-list: Ignore">&middot;<font face="Times New Roman" size="1"><span style="FONT: 7pt 'Times New Roman'">&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; </span></font></span></span></font><font face="Arial" color="#000080" size="2"><span style="FONT-SIZE: 10pt; COLOR: navy; FONT-FAMILY: Arial">Able to work across the full range of industry sectors particularly on transportation, industrial, building and marine projects <o:p></o:p></span></font></p>            <p class="MsoNormal" style="MARGIN-BOTTOM: 5pt; MARGIN-LEFT: 12.6pt; TEXT-INDENT: -13.5pt; MARGIN-RIGHT: 0in; TEXT-ALIGN: justify; mso-margin-top-alt: 5.0pt; mso-list: l0 level1 lfo3"><font face="Symbol" color="#000080" size="2"><span style="FONT-SIZE: 10pt; COLOR: navy; FONT-FAMILY: Symbol"><span style="mso-list: Ignore">&middot;<font face="Times New Roman" size="1"><span style="FONT: 7pt 'Times New Roman'">&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; </span></font></span></span></font><font face="Arial" color="#000080" size="2"><span style="FONT-SIZE: 10pt; COLOR: navy; FONT-FAMILY: Arial">Responsible for liaising with clients and other consultants and for the technical delivery of projects<o:p></o:p></span></font></p>            <p class="MsoNormal" style="MARGIN-BOTTOM: 5pt; MARGIN-LEFT: 12.6pt; TEXT-INDENT: -13.5pt; MARGIN-RIGHT: 0in; TEXT-ALIGN: justify; mso-margin-top-alt: 5.0pt; mso-list: l0 level1 lfo3"><font face="Symbol" color="#000080" size="2"><span style="FONT-SIZE: 10pt; COLOR: navy; FONT-FAMILY: Symbol"><span style="mso-list: Ignore">&middot;<font face="Times New Roman" size="1"><span style="FONT: 7pt 'Times New Roman'">&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; </span></font></span></span></font><font face="Arial" color="#000080" size="2"><span style="FONT-SIZE: 10pt; COLOR: navy; FONT-FAMILY: Arial">Oversee a team of 2 to 5 engineers and draftspersons<o:p></o:p></span></font></p>            <p class="MsoNormal" style="MARGIN-BOTTOM: 5pt; MARGIN-LEFT: 12.6pt; TEXT-INDENT: -13.5pt; MARGIN-RIGHT: 0in; TEXT-ALIGN: justify; mso-margin-top-alt: 5.0pt; mso-list: l0 level1 lfo3"><font face="Symbol" color="#000080" size="2"><span style="FONT-SIZE: 10pt; COLOR: navy; FONT-FAMILY: Symbol"><span style="mso-list: Ignore">&middot;<font face="Times New Roman" size="1"><span style="FONT: 7pt 'Times New Roman'">&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; </span></font></span></span></font><font face="Arial" color="#000080" size="2"><span style="FONT-SIZE: 10pt; COLOR: navy; FONT-FAMILY: Arial">Carry out geotechnical design using appropriate finite element and other commercial software, spreadsheet applications and manual calculations in accordance with local and international standards and codes of practice<o:p></o:p></span></font></p>            <p class="MsoNormal" style="MARGIN-BOTTOM: 5pt; MARGIN-LEFT: 12.6pt; TEXT-INDENT: -13.5pt; MARGIN-RIGHT: 0in; TEXT-ALIGN: justify; mso-margin-top-alt: 5.0pt; mso-list: l0 level1 lfo3"><font face="Symbol" color="#000080" size="2"><span style="FONT-SIZE: 10pt; COLOR: navy; FONT-FAMILY: Symbol"><span style="mso-list: Ignore">&middot;<font face="Times New Roman" size="1"><span style="FONT: 7pt 'Times New Roman'">&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; </span></font></span></span></font><font face="Arial" color="#000080" size="2"><span style="FONT-SIZE: 10pt; COLOR: navy; FONT-FAMILY: Arial">Ensure implementation and practice of personal safety and safe working practices in accordance with WorleyParsons OH&amp;S procedures within the team<o:p></o:p></span></font></p>            <p class="MsoNormal" style="MARGIN-BOTTOM: 5pt; MARGIN-LEFT: 12.6pt; TEXT-INDENT: -13.5pt; MARGIN-RIGHT: 0in; TEXT-ALIGN: justify; mso-margin-top-alt: 5.0pt; mso-list: l0 level1 lfo3"><font face="Symbol" color="#000080" size="2"><span style="FONT-SIZE: 10pt; COLOR: navy; FONT-FAMILY: Symbol"><span style="mso-list: Ignore">&middot;<font face="Times New Roman" size="1"><span style="FONT: 7pt 'Times New Roman'">&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; </span></font></span></span></font><font face="Arial" color="#000080" size="2"><span style="FONT-SIZE: 10pt; COLOR: navy; FONT-FAMILY: Arial">Ensure technical integrity of the geotechnical deliverables within the provisions and guidelines of the Worley Parsons Quality Assurance system<o:p></o:p></span></font></p>            <p class="Bullet1" style="MARGIN-LEFT: 0in; TEXT-INDENT: 0in; mso-list: none"><font face="Arial" color="#000080" size="2"><span lang="EN-AU" style="FONT-SIZE: 10pt; COLOR: navy"><o:p>&nbsp;</o:p></span></font></p>            </td>        </tr>    </tbody></table><h2 style="MARGIN: 0in 0in 0pt"><strong><em><font face="Arial" color="#000080" size="2"><span style="FONT-SIZE: 10pt; COLOR: navy"><o:p>&nbsp;</o:p></span></font></em></strong></h2><p class="MsoNormal"><strong><font face="Arial" color="#000080" size="2"><span style="FONT-WEIGHT: bold; FONT-SIZE: 10pt; COLOR: navy; FONT-FAMILY: Arial"><o:p>&nbsp;</o:p></span></font></strong></p><p class="MsoNormal"><font face="Arial" color="#000080" size="2"><span style="FONT-SIZE: 10pt; COLOR: navy; FONT-FAMILY: Arial">Please send your CV in a Word format to jobs<a title="mailto:menusha@alpsoft-tech.com" href="mailto:jobs@alpsoft-tech.com" ymailto="mailto:jobs%40genovate.com"><font title="mailto:menusha@alpsoft-tech.com" color="#000080"><span title="mailto:menusha@alpsoft-tech.com"><span title="mailto:menusha@alpsoft-tech.com" style="COLOR: navy">@alpsoft-tech.com</span></span></font></a> mentions your current and expected salaries and earliest availability.<o:p></o:p></span></font></p>]]></description>
<date>5/20/2009</date>
<time>12:42:00 PM</time>
<link>http://blog.8pixel.net/?view=plink&amp;id=197</link>
<id>197</id></item>
<item>
<title><![CDATA[Senior Resident Architect]]></title>
<description><![CDATA[<p><table style="mso-cellspacing: 1.5pt; mso-padding-alt: 0in 0in 0in 0in" cellpadding="0" border="0" class="MsoNormalTable">    <tbody>        <tr style="mso-yfti-irow: 0; mso-yfti-firstrow: yes">            <td style="BORDER-RIGHT: #ece9d8; PADDING-RIGHT: 0.75pt; BORDER-TOP: #ece9d8; PADDING-LEFT: 0.75pt; PADDING-BOTTOM: 0.75pt; BORDER-LEFT: #ece9d8; PADDING-TOP: 0.75pt; BORDER-BOTTOM: #ece9d8; BACKGROUND-COLOR: transparent" valign="top">            <p><span style="FONT-SIZE: 10pt; COLOR: navy; FONT-FAMILY: Arial">Plan and monitor project to ensure that the budget, delivery, schedule, technical, safety &amp; quality aspect are met.<o:p></o:p></span></p>            <p><span style="FONT-SIZE: 10pt; COLOR: navy; FONT-FAMILY: Arial">Coordinate change control within the assigned areas and project's development<o:p></o:p></span></p>            <p><span style="FONT-SIZE: 10pt; COLOR: navy; FONT-FAMILY: Arial">Ensure that works and priorities are defined within the project objectives<o:p></o:p></span></p>            <p><span style="FONT-SIZE: 10pt; COLOR: navy; FONT-FAMILY: Arial">Review client's comments and respond to customer's queries<o:p></o:p></span></p>            <p><span style="FONT-SIZE: 10pt; COLOR: navy; FONT-FAMILY: Arial">Provide management with regulates updates and report on the development of the projects<o:p></o:p></span></p>            <p><span style="FONT-SIZE: 10pt; COLOR: navy; FONT-FAMILY: Arial">&nbsp;<o:p></o:p></span></p>            </td>        </tr>        <tr style="mso-yfti-irow: 1">            <td style="BORDER-RIGHT: #ece9d8; PADDING-RIGHT: 0.75pt; BORDER-TOP: #ece9d8; PADDING-LEFT: 0.75pt; PADDING-BOTTOM: 0.75pt; BORDER-LEFT: #ece9d8; PADDING-TOP: 0.75pt; BORDER-BOTTOM: #ece9d8; BACKGROUND-COLOR: transparent">            <p class="MsoNormal" style="MARGIN: 0in 0in 0pt; mso-margin-top-alt: auto; mso-margin-bottom-alt: auto"><span style="FONT-SIZE: 10pt; COLOR: navy; FONT-FAMILY: Arial">&nbsp;<o:p></o:p></span></p>            </td>        </tr>        <tr style="mso-yfti-irow: 2">            <td style="BORDER-RIGHT: #ece9d8; PADDING-RIGHT: 0.75pt; BORDER-TOP: #ece9d8; PADDING-LEFT: 0.75pt; BACKGROUND: #e9e9e9; PADDING-BOTTOM: 0.75pt; BORDER-LEFT: #ece9d8; PADDING-TOP: 0.75pt; BORDER-BOTTOM: #ece9d8" valign="top">            <p class="MsoNormal" style="MARGIN: 0in 0in 0pt; mso-margin-top-alt: auto; mso-margin-bottom-alt: auto"><strong><span style="FONT-SIZE: 10pt; COLOR: navy; FONT-FAMILY: Arial">Requirements</span></strong><span style="FONT-SIZE: 10pt; COLOR: navy; FONT-FAMILY: Arial"><o:p></o:p></span></p>            </td>        </tr>        <tr style="mso-yfti-irow: 3; mso-yfti-lastrow: yes">            <td style="BORDER-RIGHT: #ece9d8; PADDING-RIGHT: 0.75pt; BORDER-TOP: #ece9d8; PADDING-LEFT: 0.75pt; PADDING-BOTTOM: 0.75pt; BORDER-LEFT: #ece9d8; PADDING-TOP: 0.75pt; BORDER-BOTTOM: #ece9d8; BACKGROUND-COLOR: transparent" valign="top">            <p class="MsoNormal" style="MARGIN: 0in 0in 0pt; mso-margin-top-alt: auto; mso-margin-bottom-alt: auto"><span style="FONT-SIZE: 10pt; COLOR: navy; FONT-FAMILY: Arial"><o:p>&nbsp;</o:p></span></p>            <ul type="disc">                <li class="MsoNormal" style="MARGIN: 0in 0in 0pt; COLOR: navy; mso-margin-top-alt: auto; mso-margin-bottom-alt: auto; mso-list: l0 level1 lfo1; tab-stops: list .5in"><span style="FONT-SIZE: 10pt; FONT-FAMILY: Arial">Candidate must possess at least a Bachelor's Degree, Post Graduate Diploma, Professional Degree, Architecture, recongnised by the Board of Architects&nbsp;or equivalent. <o:p></o:p></span></li>                <li class="MsoNormal" style="MARGIN: 0in 0in 0pt; COLOR: navy; mso-margin-top-alt: auto; mso-margin-bottom-alt: auto; mso-list: l0 level1 lfo1; tab-stops: list .5in"><span style="FONT-SIZE: 10pt; FONT-FAMILY: Arial">Registered with BOA perferable <o:p></o:p></span></li>                <li class="MsoNormal" style="MARGIN: 0in 0in 0pt; COLOR: navy; mso-margin-top-alt: auto; mso-margin-bottom-alt: auto; mso-list: l0 level1 lfo1; tab-stops: list .5in"><span style="FONT-SIZE: 10pt; FONT-FAMILY: Arial">At least 15 year(s) of working experience in the related field is required for this position, with at least 5 years in large scale projects, including curtain wall construction, interior works, landscaping works and all other related works. <o:p></o:p></span></li>                <li class="MsoNormal" style="MARGIN: 0in 0in 0pt; COLOR: navy; mso-margin-top-alt: auto; mso-margin-bottom-alt: auto; mso-list: l0 level1 lfo1; tab-stops: list .5in"><span style="FONT-SIZE: 10pt; FONT-FAMILY: Arial">Relevant experience in Park project with landscaping planning and systems would be an advantage. <o:p></o:p></span></li>            </ul>            </td>        </tr>    </tbody></table></p><p class="MsoNormal"><font face="Arial" color="#000080" size="2"><span style="FONT-SIZE: 10pt; COLOR: navy; FONT-FAMILY: Arial">Please send your CV in a Word format to <a title="mailto:jobs@alpsoft-tech.com" href="mailto:jobs@alpsoft-tech.com" ymailto="mailto:jobs%40genovate.com"><font title="mailto:jobs@alpsoft-tech.com" color="#000080"><span title="mailto:jobs@alpsoft-tech.com"><span title="mailto:jobs@alpsoft-tech.com"><span title="mailto:jobs@alpsoft-tech.com" style="COLOR: navy"><span title="mailto:jobs@alpsoft-tech.com">jobs@alpsoft-tech.com</span></span></span></span></font></a> and mentions your current and expected salaries and earliest availability.<o:p></o:p></span></font></p><p class="MsoNormal"><strong><font face="Arial" color="#000080" size="2"><span style="FONT-WEIGHT: bold; FONT-SIZE: 10pt; COLOR: navy; FONT-FAMILY: Arial"><o:p>&nbsp;</o:p></span></font></strong></p><p>&nbsp;</p>]]></description>
<date>4/3/2009</date>
<time>11:23:00 AM</time>
<link>http://blog.8pixel.net/?view=plink&amp;id=196</link>
<id>196</id></item>
<item>
<title><![CDATA[Resident Technical Officer (Electrical)]]></title>
<description><![CDATA[<p class="MsoNormal" style="MARGIN: 0in 0in 0pt"><strong style="mso-bidi-font-weight: normal"><u><font size="3"><font face="Times New Roman">Duties: <o:p></o:p></font></font></u></strong></p><p class="MsoNormal" style="MARGIN: 0in 0in 0pt"><font face="Times New Roman" size="3">-Conduct in progress inspections to ensure work carry out complies with quality<span style="mso-spacerun: yes">&nbsp;&nbsp;&nbsp;&nbsp; </span>standards and requirements. </font></p><p class="MsoNormal" style="MARGIN: 0in 0in 0pt"><o:p><font face="Times New Roman" size="3">&nbsp;</font></o:p></p><p class="MsoNormal" style="MARGIN: 0in 0in 0pt"><font face="Times New Roman" size="3">-Attend site meeting and conduct regular inspection.</font></p><p class="MsoNormal" style="MARGIN: 0in 0in 0pt"><o:p><font face="Times New Roman" size="3">&nbsp;</font></o:p></p><p class="MsoNormal" style="MARGIN: 0in 0in 0pt"><font face="Times New Roman" size="3">-Report to Project Engineers on the development of the projects</font></p><p class="MsoNormal" style="MARGIN: 0in 0in 0pt"><o:p><font face="Times New Roman" size="3">&nbsp;</font></o:p></p><p class="MsoNormal" style="MARGIN: 0in 0in 0pt"><o:p><font face="Times New Roman" size="3">&nbsp;</font></o:p></p><p class="MsoNormal" style="MARGIN: 0in 0in 0pt"><strong style="mso-bidi-font-weight: normal"><u><font size="3"><font face="Times New Roman">Requirements:<o:p></o:p></font></font></u></strong></p><p class="MsoNormal" style="MARGIN: 0in 0in 0pt"><font face="Times New Roman" size="3">- Min Diploma in Electrical Engineering</font></p><p class="MsoNormal" style="MARGIN: 0in 0in 0pt"><o:p><font face="Times New Roman" size="3">&nbsp;</font></o:p></p><p class="MsoNormal" style="MARGIN: 0in 0in 0pt"><font face="Times New Roman" size="3">- Must be registered with BCA as a Resident Technical Officer</font></p><p class="MsoNormal" style="MARGIN: 0in 0in 0pt"><o:p><font face="Times New Roman" size="3">&nbsp;</font></o:p></p><p class="MsoNormal" style="MARGIN: 0in 0in 0pt"><font face="Times New Roman" size="3">- Min 3-5 site experience in supervision of electrical works</font></p><p class="MsoNormal" style="MARGIN: 0in 0in 0pt"><font face="Times New Roman" size="3"></font></p><p class="MsoNormal" style="MARGIN: 0in 0in 0pt"><font face="Arial" color="#000080" size="2"><span style="FONT-SIZE: 10pt; COLOR: navy; FONT-FAMILY: Arial"><strong>Please send your CV in a Word format to </strong><a title="mailto:jobs@alpsoft-tech.com" ymailto="mailto:jobs%40genovate.com" href="mailto:jobs@alpsoft-tech.com"><font title="mailto:jobs@alpsoft-tech.com" color="#000080"><span title="mailto:jobs@alpsoft-tech.com"><span title="mailto:jobs@alpsoft-tech.com"><span title="mailto:jobs@alpsoft-tech.com" style="COLOR: navy"><span title="mailto:jobs@alpsoft-tech.com"><strong>jobs@alpsoft-tech.com</strong></span></span></span></span></font></a><strong>&nbsp;mentions your current and expected salaries and earliest availability.<o:p></o:p></strong></span></font></p>]]></description>
<date>4/3/2009</date>
<time>11:21:00 AM</time>
<link>http://blog.8pixel.net/?view=plink&amp;id=195</link>
<id>195</id></item>
<item>
<title><![CDATA[Project / Assistant Engineer / Technician]]></title>
<description><![CDATA[<font face="Arial"><font face="Arial"><strong>Job Description :<br /></strong>To assist field termination, commissioning work <br />To assist indoor console and rack assembly work <br />Preferred ITE/Diploma in Electronics communications, fresh or 1 to 2 years experience<br />Please forward your updated wordFormat CV to <a href="mailto:jobs@alpsoft-tech.com">jobs@alpsoft-tech.com</a> with following Details <br />current salary:<br />Expected Salary:<br />Availability:</font></font>]]></description>
<date>12/10/2008</date>
<time>2:32:00 PM</time>
<link>http://blog.8pixel.net/?view=plink&amp;id=193</link>
<id>193</id></item>
<item>
<title><![CDATA[Service / Assistant Engineer]]></title>
<description><![CDATA[<p><font face="Arial"><font face="Arial"><strong>Job Description :</strong><br />Service of marine communication, navigational equipment <br />Installing and commissioning of related equipment <br />Preferred diploma in Electronics communications or ex navy<br />Please forward your updated wordFormat CV to <a href="mailto:jobs@alpsoft-tech.com">jobs@alpsoft-tech.com</a> with following Details <br />current salary:<br />Expected Salary:<br />Availability:</font></font></p><p>&nbsp;</p><p>&nbsp;</p>]]></description>
<date>12/10/2008</date>
<time>2:23:00 PM</time>
<link>http://blog.8pixel.net/?view=plink&amp;id=192</link>
<id>192</id></item>
<item>
<title><![CDATA[ProE System Administrator]]></title>
<description><![CDATA[<strong>Description:</strong> <br />-&gt; 3 years of hands-on experience on ProE<br />-&gt; Some hands on Workshop <br />&nbsp;&nbsp;&nbsp; *Pro/INTRALINK Workshop <br />&nbsp;&nbsp;&nbsp; *Pro/E License Borrowing Methods Training<br /><em>Please submit your updated resume in Microsoft Word Format at jobs@alpsoft-tech.com stating your current salary, expected salary and notice period of commencement.</em>]]></description>
<date>12/4/2008</date>
<time>11:59:00 AM</time>
<link>http://blog.8pixel.net/?view=plink&amp;id=191</link>
<id>191</id></item>
<item>
<title><![CDATA[EDLS Engineer (Product cum Customer Development)]]></title>
<description><![CDATA[<font face="Arial"><font face="Arial"><strong>Responsibilities:</strong><br />*Conduct experimental research on various properties of the Company&rsquo;s products, as well as analysis and tests to investigate the chemical phenomena of products. <br />*Responsible for new product testing, development and prototype production; as well as assisting customers during material evaluation and qualification phases with the Company&rsquo;s products. <br />*To work closely with customers in the development of suitable material configurations to meet customer needs and providing technical support to them. <br /><strong>Requirements:</strong><br />*Good Degree in Polymer / Material Engineering or Chemistry. <br />*Preferably two years experience relevant work experience with IC packaging materials and processes:- encapsulant, silver epoxy, substrates, lead frame, under-fill, FOL, EOL, etc.<br />*Experience in IC package failure analysis (FA) or polymer science and semiconductor materials composition is advantageous. <br />*Knowledge of DOE is preferred. <br />*Result oriented team player and ability to work independently to complete projects.<br />*Strong desire and commitment to motivate for continuous improvement.<br />*Ability to work under pressure to meet deadlines. <br />*Fresh graduates with strong interest in research and development work are also welcome to apply. <br /><em>Please submit your updated resume in Microsoft Word Format at jobs@alpsoft-tech.com stating your current salary, expected salary and notice period of commencement.</em></font></font>]]></description>
<date>11/6/2008</date>
<time>4:10:00 PM</time>
<link>http://blog.8pixel.net/?view=plink&amp;id=190</link>
<id>190</id></item>
<item>
<title><![CDATA[Associate Engineer]]></title>
<description><![CDATA[<font face="Arial"><strong>Responsibilities:</strong><br />*Provide the administration and operations support for the contract administration for DEL, SNBB, mio Voice, mio TV, FTTH services,&nbsp; payphone works, etc. <br />*Prepare documents and call for tenders and quotations. <br />*Arrange for briefing sessions on tender/quotation offer to bidders. <br />*Participate in the evaluation of tender/quotation. <br />*Draft adjudication paper for submission to Tender/Quotation Adjudication Committee for award decision. <br />*Liaise with Contractors, Operations and Network Quality &amp; Performance on the work and delivery performance of Contractors. <br />*Monitor the Contractors' performance and verify non-conformance.&nbsp; <br />*Monitor contract value utilization. (Monthly usage is provided by Users/Operations.) <br />*Carry out administrative work such as issue passes, print materials, etc. <br /><strong>Requirements:</strong><br />*Diploma in a technical field. <br />*2 years of operations experience, preferably in a telecommunications-related industry. <br />*Contract-related experience is an advantage. <br />*Good communication and negotiation skills. <br />*Strong analytical skills. <br />*Independent and resourceful team player. <br /><em>Please submit your updated resume in Microsoft Word Format at jobs@alpsoft-tech.com stating your current salary, expected salary and notice period of commencement.</em>&nbsp;<br />&nbsp;</font>]]></description>
<date>10/6/2008</date>
<time>5:34:00 PM</time>
<link>http://blog.8pixel.net/?view=plink&amp;id=189</link>
<id>189</id></item>
<item>
<title><![CDATA[Environment Health & Safety Engineer ]]></title>
<description><![CDATA[<font face="Arial"><font face="Arial"><font face="Arial"><p><font face="Arial"><font face="Arial"><strong>Job :</strong> <br />*Maintain, implement &amp; improve the Environment, Health &amp; Safety (EHS) management system per Avago Technologies Environment management policies and guidelines for Wafer Fabs. <br />*Ensure compliance to statutory EHS regulations and conformance to EHS management system. <br />*Primary activities at Senoko site. <br /><strong>Req&nbsp;:</strong><br />*Master/Degree in any discipline from recognized institutions or equivalent.&nbsp; Qualification in Environment Science, Environmental Management or chemical engineering will be added advantage. <br />*2 to 3 years of working experience Environment Health &amp; Safety field, electronic and semiconductor fabrication in manufacturing environment is preferred. <br />*SCDF certified Fire Safety Manager and MOM certified Registered Safety Officer qualification preferred. <br />*Possess working knowledge and hands-on experience with ISO 14001, MOM prescribed SMS &amp; other Safety Management Systems, such as OHSAS 18000, etc. <br /><em>Please submit your updated resume in Microsoft Word Format at jobs@alpsoft-tech.com stating your current salary, expected salary and notice period of commencement.</em>&nbsp;<br />&nbsp;</font></font></p></font></font></font>]]></description>
<date>9/30/2008</date>
<time>4:04:00 PM</time>
<link>http://blog.8pixel.net/?view=plink&amp;id=188</link>
<id>188</id></item>
<item>
<title><![CDATA[Six / Lean Sigma ]]></title>
<description><![CDATA[<p><font face="Arial"><strong>Job Description:</strong> <br />Produce highly credible process breakthrough by using a replicable approach and subsequently enabling a transfer of </font><font face="Arial">the application methods, techniques and tools to peer groups and other process improvement teams <br />Identify opportunities to improve processes and drive workforce productivity and cost savings for the business <br />Manage conflict at many levels of the organization and able to effectively lead cross functional process improvement </font><font face="Arial">teams, and mentor /advise management on the formulation and implementation of process improvement plans.&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; </font><font face="Arial"><strong>Pre-requisites:</strong> <br />Degree/ Master in Industrial Engineering or Business with min 5 years of relevant experience and held Lean or Six </font><font face="Arial">Sigma Black Belt is a must&nbsp; <br />Ability to learn/use Lean and Six Sigma techniques <br />Possess project management skill <br />Strong communication and presentation skills in both spoken and written English <br />Able to collaborate and interlock at various levels of management and staffs <br />Able to quickly understand processes using established methodologies and tools, and the flexibility to develop new </font><font face="Arial">approaches for specific situations <br />Consult background is a plus <br />Travel require<br /><em>Please submit your updated resume in Microsoft Word Format at jobs@alpsoft-tech.com stating your current salary, expected salary and notice period of commencement.</em><br /></font></p>]]></description>
<date>9/22/2008</date>
<time>10:14:00 AM</time>
<link>http://blog.8pixel.net/?view=plink&amp;id=187</link>
<id>187</id></item>
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<title><![CDATA[Technical Marketing Engineer]]></title>
<description><![CDATA[<font face="Arial"><strong>Job Description :</strong> <br />Be part of the worldwide market and application development team in the fast growing optocoupler business unit based in Singapore and be responsible for:<br />&bull;&nbsp;Develop new markets and applications to generate revenue growth for assigned product portfolio.<br />&bull;&nbsp;Perform in-depth technical analysis on application systems to identify technical requirements for Avago&rsquo;s isolation products.<br />&bull;&nbsp;Perform bench measurements and characterizations for customer applications and create application notes and technical papers to ease new product design-in. <br />&bull;&nbsp;Provide application support to resolve system and application issues faced by key customers.<br />&bull;&nbsp;Work with cross functional team, including R&amp;D and Engineering, to drive for new product development and proliferation.<br />&bull;&nbsp;Developing good sales tools and documentation to complement programs initiated.<br /><strong>Qualifications :</strong><br />&bull;&nbsp;Masters/Degree in Electronics/Electrical/Computer Engineering with minimum of 3 years experience in application, R&amp;D or engineering.<br />&bull;&nbsp;Working knowledge of analog and mixed signal products, motor control, power conversion and industrial systems will be an added advantage.<br />&bull;&nbsp;High quality individuals who are self-learners and team players with strong technical and analytical ability and good communication skill.<br />&bull;&nbsp;Worldwide travels will be required.<br /><em>Please submit your updated resume in Microsoft Word Format at alpsoft-tech.com stating your current salary, expected salary and notice period of commencement.<br /></em></font>]]></description>
<date>9/4/2008</date>
<time>5:10:00 PM</time>
<link>http://blog.8pixel.net/?view=plink&amp;id=186</link>
<id>186</id></item>
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<title><![CDATA[Draughtsmen]]></title>
<description><![CDATA[<font face="Arial"><strong>Requirements:</strong><br />---Must understand/interpret electrical wiring drawings<br />---Able to work in Aerospace Industry<br />---Have proficiency in AutoCAD and CATIA<br />---Fresh graduates are welcome to apply<br />---Diploma in Electrical/Electronics/Aerospace Engineering<br /><em>Please submit your updated resume in Microsoft Word Format at jobs@alpsoft-tech.com stating your current salary, expected salary and notice period of commencement.</em></font>]]></description>
<date>7/28/2008</date>
<time>10:03:00 AM</time>
<link>http://blog.8pixel.net/?view=plink&amp;id=185</link>
<id>185</id></item>
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<title><![CDATA[Quality Assurance Manager]]></title>
<description><![CDATA[<font face="Arial"><strong>Responsibilities:</strong><br />&bull;To manage the quality system in the company. Review and Implement changes in the system to ensure effectiveness. <br />&bull;To participate in contract review and ensure that the quality requirement and specification are adequately defined and met in production. <br />&bull;To control and chair the Quality meeting, ensure proper disposition of internal rejects and customer&rsquo;s return. To initiate corrective action where appropriate and prevent recurrence of rejects. <br />&bull;To liaise with customer on issues related to quality and to represent the company quality matters. <br />&bull;To establish and maintain procedure for document control and to chair engineering change to ensure changes are reviewed, recorded and approved by the relevant department<br /><strong>Requirements:</strong> <br />&bull;Diploma / Degree in Engineering (Electrical / Manufacturing / Industrial / Material) or equivalent. <br />&bull;At least 4 years relevant experience with exposure in a fast paced manufacturing environment preferably in plastic injection moulding industry. <br />&bull;A team player with excellent analytical, communication, leadership and interpersonal skill. <br />&bull;Knowledge and experience in the applications of the SPC, FMEA, Measurement System Analysis, GR&amp;R, DOE and other problem problem-solving tools is preferred. <br />&bull;Should also possess a good understanding of ISO 9001, ISO14001, OSHAS18001. <br />&bull;Requires language(S): Chinese, English<br /><em>Please submit your updated resume in Microsoft Word Format at jobs@alpsoft-tech.com stating your current salary, expected salary and notice period of commencement.</em>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; </font>]]></description>
<date>7/9/2008</date>
<time>2:01:00 PM</time>
<link>http://blog.8pixel.net/?view=plink&amp;id=184</link>
<id>184</id></item>
<item>
<title><![CDATA[Process Engineer - Moulding]]></title>
<description><![CDATA[<p><font face="Arial"><strong>Responsibilities:</strong><br />--Identify, evaluate and solve technical product or process problems with material, equipment etc in the area of responsibility<br />--Design and implement improvements to products, processes, material, tooling equipment, or documentation which enhance the utility, quality, realibility or cost effectiveness in the area of responsibility<br />--Design and execute engineering projects in accordance with set specifications and EHS standard<br /><strong>Requirements:</strong><br />--Degree in Mechatronic/Material/Manufacturing Engineering/Industrial Engineering or equivalent<br />--At least 3 years relevant experience with exposure in a fast paced manufacturing environment preferably in plastic injection moulding<br />--A team player with excellent analytical, communication and interpersonal skill<br />--Knowledge and experience in the applications of the SPC, FMEA, Measurement System Analysis, GR&amp;R and other problem-solving tools is preferred<br />--Languages: English &amp; Chinese<br />--Male<br /><em>Please submit your updated resume in Microsoft Word Format at jobs@alpsoft-tech.com stating your current salary, expected salary and notice period of commencement.</em>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; </font></p>]]></description>
<date>7/9/2008</date>
<time>1:39:00 PM</time>
<link>http://blog.8pixel.net/?view=plink&amp;id=183</link>
<id>183</id></item>
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<title><![CDATA[Aerospace Technician]]></title>
<description><![CDATA[<font face="Arial"><strong>Requirements:</strong><br />---Must understand/interpret electrical wiring drawings <br />---Have proficiency in AutoCAD<br />---Able to work in Aerospace Industry<br />---Fresh graduate are welcome to apply<br />---Diploma in Electrical/Electronics/Aerospace Engineering<br /><em>Please submit your updated resume in Microsoft Word Format at jobs@alpsoft-tech.com stating your current salary, expected salary and notice period of commencement.<br /></em></font>]]></description>
<date>7/8/2008</date>
<time>5:20:00 PM</time>
<link>http://blog.8pixel.net/?view=plink&amp;id=182</link>
<id>182</id></item>
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<title><![CDATA[Facilities Senior/Technical Specialist]]></title>
<description><![CDATA[<font face="Arial"><strong>Job Description:</strong><br /><em>*Provide support for facilities in one or more of the following areas:<br /></em>---Building/building equipment, life safety system, environmental, health and safety<br />---Responsible for supporting electrical equipment, electrical systems, plumbing, ventilation and air conditioning, water, waste systems and other mechanical and building systems.<br />---Work with outside contractors on facilities and equipment repairs, furniture moving, electrical projects, light construction, etc.<br />---Provide technical and/or operational support for company environmental, health and safety programs in areas such as operating procedures, controls, environmental sampling and efficiency of equipment and processes required to ensure regulatory compliance<br />---Work under minimal supervision<br />---Within area of responsibility, perform a wide range of responsibilities using advanced and/or specialized skills <br /><em>*Responsible for one or more of the following:</em><br />---Install, maintain, troubleshoot and repair sophisticated equipment or systems<br />---Independently operate processes and make compliance decision <br />---Define and implement preventive maintenance programs on a select group of equipment<br />---Use advanced technical knowledge to co-ordinate company environmental, health and safety programs<br />---Collect and organize data, as well as interpret readings and assess potential hazards<br /><strong>Job Requirements:</strong><br />*Diploma in Electrical/Electronic/Mechanical Engineering or a higher specialized training/certification, with minimum 5 years directly related experience, and typically 10 years experience<br /><em>Please submit your updated resume in Microsoft Word Format at jobs@alpsoft-tech.com stating your current salary, expected salary and notice period of commencement.</em></font>]]></description>
<date>7/8/2008</date>
<time>10:19:00 AM</time>
<link>http://blog.8pixel.net/?view=plink&amp;id=181</link>
<id>181</id></item>
<item>
<title><![CDATA[R&D Test Engineer]]></title>
<description><![CDATA[<font face="Arial"><strong>Job Description:</strong><br />*Be part of our test engineering team chartered to provide R&amp;D test support for fiber optics transceiver testing at various international sites of our contract manufacturers&nbsp; <br />*Opportunities to learn about fiber optics transceiver product test knowledge and at the same time, drive initiatives on continuous test improvement to enhance testers' efficiency. These constitute reducing test time, developing new test methodologies and establishing effective hardware configuration for ease of maintenance <br />*Work with US/Italy R&amp;D counterparts on test improvement; manage NPI test development and resources to ensure prompt release of R&amp;D testers to production lines; as well as generate and maintain up-to-date test documentation<br /><strong>Requirements:</strong><br />*Degree in Electrical/Electronics Engineering with 1 - 3 years' related experience in manufacturing testing and an understanding of fiber optics technology trends. Fresh graduates are also welcome to apply&nbsp; <br />*Functional knowledge of Agilent/JDSU fiber optics test equipment will be advantageous; whilst good analytical and troubleshooting skills as well as ability to speak and write simple Mandarin are essential <br />*Able and willing to travel overseas&nbsp; <br />*Creativity and proficiency in software programming are required; whilst knowledge of VEE, VC++ and SQL will be advantageous<br /><em>Please submit your updated resume in Microsoft Word Format at jobs@alpsoft-tech.com stating your current salary, expected salary and notice period of commencement. <br /></em></font>]]></description>
<date>7/7/2008</date>
<time>5:58:00 PM</time>
<link>http://blog.8pixel.net/?view=plink&amp;id=180</link>
<id>180</id></item>
<item>
<title><![CDATA[III-V Epitaxy Associate Engineer - Machinery & Equipment]]></title>
<description><![CDATA[<p><font face="Arial"><strong>Job Description:</strong><br />-Responsible for improving the uptime of III-V Epitaxy production reactors and testing equipment by repair, preventive/predictive maintenance, machine module upgrades and design improvements. <br />-Handle gas cylinders and chemicals changes in a cleanroom environment. <br />-Active involvement in emergency response team as shift leader. <br />-Use CAD system to perform design work <br />-12 Hour Night Shift (shift allowance will be given) <br /><strong>Requirements:</strong><br />-Diploma in Electrical or Mechanical Engineering with effective analytical skills in an electro-mechanical field and basic repair up to board level <br />-Able to communicate and write effectively in English<br /><em>Please submit your updated resume in Microsoft Word Format at jobs@alpsoft-tech.com stating your current salary, expected salary and notice period of commencement.</em></font></p><p><font face="Arial"><br />&nbsp;</font></p>]]></description>
<date>7/4/2008</date>
<time>5:28:00 PM</time>
<link>http://blog.8pixel.net/?view=plink&amp;id=179</link>
<id>179</id></item>
<item>
<title><![CDATA[Product Engineer]]></title>
<description><![CDATA[<p><font face="Arial"><strong>Responsibilities:</strong><br />-&nbsp;&nbsp; Perform various Product Support, Failure analysis, Project Management role on PC related products. <br /><strong>Requirements:</strong> <br />-&nbsp;&nbsp; Degree in Electrical &amp; Electronics Engineering or equivalent. <br />-&nbsp;&nbsp; Minimum 2 years working experiences on related fields. <br />-&nbsp;&nbsp; Knowledge on PC Hardware architecture, motherboard, CPUs, I/O interfaces (RS232, USB) and storage and other PC elated electronics components. <br />-&nbsp;&nbsp; Knowledge on PC hardware design and development experiences <br />-&nbsp;&nbsp; Good knowledge on the identification of active &amp; passive components <br />-&nbsp;&nbsp; Able to attend conference call at night <br />-&nbsp;&nbsp; Experience with SMT process<br /><em>Please submit your updated resume in Microsoft Word Format at jobs@alpsoft-tech.com stating your current salary, expected salary and notice period of commencement.<br /></em></font></p>]]></description>
<date>6/26/2008</date>
<time>1:13:00 PM</time>
<link>http://blog.8pixel.net/?view=plink&amp;id=178</link>
<id>178</id></item>
<item>
<title><![CDATA[Manufacturing Engineer]]></title>
<description><![CDATA[<p><font face="Arial">Job Description:<br />*Working knowledge of technical commodity requirements, particularly PCB/flex.<br />*Experienced in quality control, i.e. SPC, FMEA, control plan<br />*Experienced in supplier selection, supplier audit ans assessment<br />*Capable of leading and facilitating cross-functional teams consisting of development engineers, production engineers and quality engineers<br />*Able to perform market analyses and make recommendations<br />*Strong project management. <br />*Able to work under pressure and handle multiple projects concurrently.<br />Requirements:<br />*Degree of Engineering, mechanical or material.<br />*3~5 years working experience with PCB/flex industry, supplier management experience.<br />*Strong oral, written, and presentation skills<br />*Critical problem solving and analytical skills <br />Please submit your updated resume in Microsoft Word Format at jobs@alpsoft-tech.com stating your current salary, expected salary and notice period of commencement. </font></p><p><font face="Arial"></font>&nbsp;</p>]]></description>
<date>6/20/2008</date>
<time>11:37:00 AM</time>
<link>http://blog.8pixel.net/?view=plink&amp;id=176</link>
<id>176</id></item>
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<title><![CDATA[Principal/Senior/Analog IC Designers]]></title>
<description><![CDATA[<font face="Arial">Job Description:<br />*Will define circuit requirements and complete design from schematic, layout, and verification to characterization.<br />*Completion of circuit layout and/or define layout requirements for a mask designer.<br />*Write specification and test requirements documentation.<br />*Behavioral modeling of analog and digital circuits. Complete mixed signal simulations for verification of chip level and system level performance.<br />*Test, characterize and de-bug designs in the lab.<br />*Interface with applications, marketing, and manufacturing to provide IC expertise.<br />Requirement:<br />*PhD/Master/Degree in Electrical/Electronics Engineering with analog design background.<br />*Experience and knowledge of analog signal processing techniques.<br />*Extensive experience using Cadence or equivalent circuit design and simulation tools.<br />*Demonstrated ability to characterize, de-bug and troubleshoot your designs in the lab through hands on characterization. Self motivated with the capability to work independently to deliver quality designs.<br />*Expertise in both Bipolar and CMOS high speed design.<br />*Demonstrated performance successfully taking designs from concept to design and characterization.<br />*Self motivated with the capability to work independently to deliver quality designs.<br />Desirable:<br />*3-5 years analog design experience.<br />*Experience in the design of opamp, comparator, ADC, LDO, DC-DC converter *Prior experience and knowledge on the use of power supply, Spectrum Analyzer, Osilliscope and other applicable equipment.<br />Please submit your updated resume in Microsoft Word Format stating your current salary, expected salary and notice period of commencement.</font>]]></description>
<date>6/13/2008</date>
<time>4:36:00 PM</time>
<link>http://blog.8pixel.net/?view=plink&amp;id=175</link>
<id>175</id></item>
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<title><![CDATA[Commodity Managers (Materials Procurement Specialist)]]></title>
<description><![CDATA[<font face="Arial"><p><font face="Arial">Job Description:<br />*Expert in any commodity for Semiconductor Industry.<br />*Source for new supplier and plan for Avago plant-wide commodity strategies.<br />*Negotiate for best in class pricing to meet current production &amp; NPI project cost reduction target.<br />*Identify and drive cost saving target to meet yearly department goals.<br />*Provide technical expertise on commodity to production &amp; NPI projects.<br />*Identify and drive to resolve major quality issue to improve on department yearly quality indices.<br />*Support Division on any escalation to expedite piecepart or resolve any urgent quality issue with supplier Requirement:<br />*Degree in Electrical/Electronics/Materials Engineering with at 5 years; practical procurement experience in a similar environment or semiconductor industry. <br />Requirement:<br />*Degree in Electrical/Electronics/Materials Engineering with at 5 years; practical procurement experience in a similar environment or semiconductor industry.<br />&nbsp;Please submit your updated resume in Microsoft Word Format at jobs@alpsoft-tech.com stating your current salary, expected salary and notice period of commencement.</font></p><p><font face="Arial"></font>&nbsp;</p></font>]]></description>
<date>6/13/2008</date>
<time>4:17:00 PM</time>
<link>http://blog.8pixel.net/?view=plink&amp;id=174</link>
<id>174</id></item>
<item>
<title><![CDATA[Principal/Senior/Package Design - Substrate Design Engineers]]></title>
<description><![CDATA[<font face="Arial">Description:<br />*Must have experience in package substrate layout / design using Cadence APD design tool, along with a strong understanding of critical package signal integrity and electrical parasitic. <br />*Knowledge of electrical, thermal, and / or mechanical modeling tools is a plus. Responsibilities include working with multiple internal and external silicon chip design teams, reliability / qualification teams, test characterization teams, suppliers and customers for the development of a total ASIC package solution, to meet the design requirements, performance expectations and release to project milestones.<br />*This includes creation of package netlists, package stack up and routing methodologies, feedback (to chip team) on device layout and chip floor planning &amp; (to customer) on package pin-out &amp; board design requirements, final package designs, external lid designs and documentation.<br />*Work with external assembly houses and substrate / lid suppliers to meet design requirements and release designs to production. <br />*This position also requires support to RFI/RFQ package selection process with knowledge of cost / performance trade-offs with respect to thermal/electrical/mechanical performance for various packaging technologies.<br />*Knowledge in packaging technologies and assembly processes is a plus.<br />Requirement:<br />*Master of Science/Degree in Electrical, Electronics Engineering or similar, with at least 5-7 years of experience of high speed, high pin count custom ASIC package design work. <br />*Good team player with strong communication, organizational, and documentation skills required. Tools:<br />Required: Cadence APD, AutoCAD, Microsoft Office (Word, Excel and Power Point).<br />Familiarity with Perl, SKILL, Raphael 2-D Maxwell Solver, Ansoft TPA / HFSS / SIWave, Polar SI9000e/8000m Transmission Line Field Solver, CST Microwave Studio, Flomerics-Flortherm and Agilent ADS a plus.<br />Please submit your updated resume in Microsoft Word Format at jobs@alpsoft-tech.com stating your current salary, expected salary and notice period of commencement. </font>]]></description>
<date>6/13/2008</date>
<time>3:59:00 PM</time>
<link>http://blog.8pixel.net/?view=plink&amp;id=173</link>
<id>173</id></item>
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<title><![CDATA[Electrical Assistant Engineer ]]></title>
<description><![CDATA[<p><font face="Arial">Responsibilities:<br />&nbsp;*&nbsp;&nbsp; Development and testing of electrical hardware circuitry used in production equipment.<br />&nbsp;*&nbsp;&nbsp; Investigating and troubleshooting problems due to electrical failures.<br />&nbsp;*&nbsp;&nbsp; Develop and write the instruction and maintenance manual<br />&nbsp;*&nbsp;&nbsp; Team player to a technical team<br />Requirements:<br />&nbsp;*&nbsp;&nbsp; Diploma/ITC in Electrical Engineering with at least 3 year's relevant experience in mechanical or Electrical background<br />&nbsp;*&nbsp;&nbsp; Fresh graduate with good result will be considered<br />&nbsp;*&nbsp;&nbsp; Possess analog and digital hardware design, microprocessor and PLC assembly language programming<br />&nbsp;*&nbsp;&nbsp; Independent, willing to learn, hardworking, proactive person<br />&nbsp;*&nbsp;&nbsp; A good team player with good interpersonal and communication skills<br />&nbsp;*&nbsp;&nbsp; Excellent verbal and written communication skills<br />&nbsp;*&nbsp;&nbsp; Able to travel frequently to China<br />Please submit your updated resume in Microsoft Word Format at <a href="mailto:jobs@alpsoft-tech.com">jobs@alpsoft-tech.com</a> stating your current salary, expected salary and notice period of commencement.</font></p>]]></description>
<date>6/13/2008</date>
<time>3:18:00 PM</time>
<link>http://blog.8pixel.net/?view=plink&amp;id=172</link>
<id>172</id></item>
<item>
<title><![CDATA[Mechanical Assistant Engineer/Engineer]]></title>
<description><![CDATA[<font face="Arial">Responsibilities:<br />&nbsp;*&nbsp;&nbsp; Assembly and install machine or equipment<br />&nbsp;*&nbsp;&nbsp; Liaise with suppliers/vendors<br />&nbsp;*&nbsp;&nbsp; Project Scheduling<br />&nbsp;*&nbsp;&nbsp; Develop and write the instruction and maintenance manual<br />&nbsp;*&nbsp;&nbsp; Team player to a technical team<br />Requirements:<br />&nbsp;*&nbsp;&nbsp; Degree/Diploma/ITC in Mechanical/Mechatronics Engineering with at least 1 to 2 year's relevant experience.<br />&nbsp;*&nbsp;&nbsp; Strong in production machine design and assembly/production innovation activities<br />&nbsp;*&nbsp;&nbsp; Creative and initiative to solve problems with creative solutions<br />&nbsp;*&nbsp;&nbsp; Able to travel frequently to China<br />Please submit your updated resume in Microsoft Word Format at <a href="mailto:jobs@alpsoft-tech.com">jobs@alpsoft-tech.com</a> stating your current salary, expected salary and notice period of commencement.</font>]]></description>
<date>6/13/2008</date>
<time>3:10:00 PM</time>
<link>http://blog.8pixel.net/?view=plink&amp;id=171</link>
<id>171</id></item>
<item>
<title><![CDATA[Mechanical Design Engineer]]></title>
<description><![CDATA[<font face="Arial">Require Mechanical Design Engineers: <br />o&nbsp;ME design experience in products<br />o&nbsp;At least 2 cycles of design and evaluation<br />o&nbsp;TV<br />Please submit your resume in Microsoft Word Format at <a href="mailto:jobs@alpsoft-tech.com">jobs@alpsoft-tech.com</a> stating your current salary, expected salary and the notice period of commencement.&nbsp;</font>]]></description>
<date>6/3/2008</date>
<time>5:21:00 PM</time>
<link>http://blog.8pixel.net/?view=plink&amp;id=170</link>
<id>170</id></item>
<item>
<title><![CDATA[Principal/Senior/R&D Mechanical Design Engineer]]></title>
<description><![CDATA[<p><font face="Arial">o Design and develop high-end optoelectronics package for use in sensor and communications system.<br />o Responsible for package development, including material selection, concepture design, package prototyping, as well as stress, thermal and electrical modeling.<br />o Design and developed new process technologies and qualified the process. <br />o Provide technical support to manufacturing process as well as continuous improvement of yield, rates, quality and cost reduction<br />Req&nbsp; :<br />o PhD/Masters/Degree in Electrical/Electronics/Mechanical/Materials/Physic/Optics Engineering with minimum of 3 years experience in a semiconductor manufacturing or R&amp;D environment.<br />o Good knowledge of semiconductor packaging process, semiconductor manufacturing equipments, and material engineering will be an added advantage.<br />o Strong knowledge of mechanical design tools, such as ANSYS, Solid designer, as well as PCB design tools<br />Please submit resume to jobs@alpsoft-tech.com stating your current salary, expected salary and the notice period of commencement.</font></p><p><font face="Arial"></font>&nbsp;</p>]]></description>
<date>5/27/2008</date>
<time>4:34:00 PM</time>
<link>http://blog.8pixel.net/?view=plink&amp;id=169</link>
<id>169</id></item>
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<title><![CDATA[Principal/Senior R&D Product Design Engineer]]></title>
<description><![CDATA[<font face="Arial">o Responsible for analog and hardware circuit design as well as link budget analysis and define the technical specifications.<br />o Debug, test and analyze and evaluate new products as well as develop test algorithm and hardware to test the product.<br />o Responsible for the characterization of the product and also analyzes and provide solutions to problems.<br />Req&nbsp; :<br />o PhD/Master/Degree in Electrical/Electronics/photonics/Computer with minimum of 2 &ndash; 3 years experience in a electronic industry<br />o Good knowledge of mobile communication systems, optoelectronics systems will be an advantage.<br />Please submit resume to jobs@alpsoft-tech.com stating your current salary, expected salary and the notice period of commencement.</font>]]></description>
<date>5/27/2008</date>
<time>4:33:00 PM</time>
<link>http://blog.8pixel.net/?view=plink&amp;id=168</link>
<id>168</id></item>
<item>
<title><![CDATA[Principal/Senior R&D Digital Designer]]></title>
<description><![CDATA[<p><font face="Arial">&bull; Responsible for Verilog/VHDL modeling and design of digital circuit and <br />embedded system.<br />&bull; Required to debug, test, and analyze prototypes and generate test patterns and fault simulations.<br />&bull; Responsible for the characterization of the product<br />Req&nbsp; :<br />&bull; Master/Degree in Computer/Electronics/Electrical Engineering.<br />&bull; Good knowledge of wireless architecture system or computer architecture <br />design. <br />&bull; Working knowledge of cadence, synopsys, mentor, Xilinx development tools will be an advantage<br />Please submit resume to jobs@alpsoft-tech.com stating your current salary, expected salary and the notice period of commencement.</font></p><p><font face="Arial"></font>&nbsp;</p>]]></description>
<date>5/27/2008</date>
<time>4:32:00 PM</time>
<link>http://blog.8pixel.net/?view=plink&amp;id=167</link>
<id>167</id></item>
<item>
<title><![CDATA[Principal/Senior R&D Electro Optics Engineer]]></title>
<description><![CDATA[<p><font face="Arial">o Design, analyze and optimize unique and complex optical system using optical simulation software<br />o Debug, test and analyze and evaluate new products as well as develop test algorithm and hardware to test the electro-optical products<br />o Design and develop secondary optics solutions, and work with customers on the requirement and specifications<br />o Responsible for the characterization of the optical components and also analyzes and provide solutions to problems.<br />Req&nbsp; :<br />o PhD/Master/Degree in Optics/Applied Physics/Electronics/photonics with minimum of 3 &ndash; 5 years experience in a electronic industry<br />o Experience in optical system modelling, optical sensors, and infrared technology<br />o Good knowledge of photometry, radiometry, spectrophotometry, and non imaging optics, as well as testings of optical components will be an advantage.<br />Please submit resume to jobs@alpsoft-tech.com stating your current salary, expected salary and the notice period of commencement.</font></p><p><font face="Arial"></font>&nbsp;</p><p><font face="Arial">&nbsp;<br /></font></p>]]></description>
<date>5/27/2008</date>
<time>4:30:00 PM</time>
<link>http://blog.8pixel.net/?view=plink&amp;id=166</link>
<id>166</id></item>
<item>
<title><![CDATA[Principal/Senior R&D Test Engineer]]></title>
<description><![CDATA[<p><font face="Arial">o Be part of our test engineering team, chartered to provide test support to production and R&amp;D for fiber optics transceiver testing - in-house, and at various international sites of our contract manufacturers.&nbsp; <br />o Opportunities to learn about fiber optics transceivers product test knowledge, and at the same time drive initiatives on continuous test improvement to enhance tester's efficiency. These constitute reducing test time, developing new test methodologies and establishing effective hardware configuration for ease of maintenance.<br />o Work with US/Italy R&amp;D counterparts on test improvement as well as manages NPI test development and resources to ensure promptly release of R&amp;D testers to production lines as well as generate and maintain up-to-date test documentation.<br />Req&nbsp; :<br />o Master Degree in Electrical/Electronics Engineering with 1-3 years related experience in manufacturing testing and basic understanding of fiber optics technology trends. Fresh graduates are welcome to apply.<br />o Functional knowledge of Avago/JDSU fiber optics test equipment will be advantageous.&nbsp; Good analytical and troubleshooting skills.<br />o Creative and proficient in software programming. Knowledge on VEE, VC++, SQL will be preferred.<br />o Able to speak and write in fluent Mandarin<br />Please submit resume to jobs@alpsoft-tech.com stating your current salary, expected salary and the notice period of commencement.</font></p><p><font face="Arial"></font>&nbsp;</p>]]></description>
<date>5/27/2008</date>
<time>4:28:00 PM</time>
<link>http://blog.8pixel.net/?view=plink&amp;id=164</link>
<id>164</id></item>
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<title><![CDATA[Senior Failure Analysis Engineer]]></title>
<description><![CDATA[<p><font face="Arial">o Provide failure analysis on customer returns, reliability/qualification and process/product related failures, as well as good device analysis for fibre optics/optocouplers/ASICs devices. <br />o Work with process/product/design teams to understand the nature and specific details of failures.<br />o Work with external Failure Analysis labs and equipment vendors to develop new analysis techniques/methodologies.<br />Req&nbsp; :<br />o Master/Degree in Electrical/Electronics/Microelectronics Engineering. Other related engineering disciplines are welcome to apply.<br />o 3-5 years relevant failure analysis experience in IC fabrication/packaging with strong analytical capabilities to detect and solve design/fabrication/process problems<br />o Knowledge on fault isolation techniques, FIB, TEM and other silicon FA experience is an added advantage.<br />o Good analytical skills and communication skills (verbal and written), able to work independently and a strong team player.<br />Please submit your resume to jobs@alpsoft-tech.com stating your current salary, expected salary and notice of commencement.</font></p><p><font face="Arial"></font>&nbsp;</p><p><font face="Arial"></font>&nbsp;</p><p><font face="Arial">&nbsp;<br /></font></p>]]></description>
<date>5/27/2008</date>
<time>4:27:00 PM</time>
<link>http://blog.8pixel.net/?view=plink&amp;id=163</link>
<id>163</id></item>
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<title><![CDATA[Equipment Associate Engineer]]></title>
<description><![CDATA[<font face="Arial">o Responsible for improving the uptime of III-V Epitaxy production reactors and testing equipment by repair, preventive/predictive maintenance, machine module upgrades and design improvements.<br />o Handle gas cylinders and chemicals changes in a cleanroom environment.<br />o Active involvement in emergency response team as shift leader.<br />o Use CAD system to perform design work.<br />Req&nbsp; :<br />o Diploma in Electrical or Mechanical Engineering with effective analytical skills in an electro-mechanical field and basic repair up to board level<br />o Able to communicate and write effectively in English<br />Please submit resume to jobs@alpsoft-tech.com stating your current salary, expected salary and the notice period of commencement.</font>]]></description>
<date>5/27/2008</date>
<time>4:26:00 PM</time>
<link>http://blog.8pixel.net/?view=plink&amp;id=162</link>
<id>162</id></item>
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<title><![CDATA[Manufacturing Engineer]]></title>
<description><![CDATA[<font face="Arial">o Provide leadership for product/process yield improvements, line capacity management, cost reductions and product proliferation projects.<br />o Provide leadership from manufacturing side to address customer oriented activities like Samples qualification and Failure analysis of field returns<br />o Team up with Production-Planning, Test, QA &amp; Material engineering to effectively support daily manufacturing activities in Contract Manufacturing locations.<br />o Work closely with local and overseas R&amp;D/Application Engineering on new product introductions. <br />o Audit Contract Manufacturing partners for process/product compliance and as well to host customer visits<br />o Knowledge on quality management system like, ISO-9001, IS-14000 preferred<br />Internal Qualifications : <br />&nbsp;o Master/Degree in Electrical/Electronics Engineering. <br />o 2 years of work experience in Fiber-optic/semiconductor/electronic product engineering is preferred. <br />o Fresh graduates are also welcome to apply.<br />&nbsp;Please submit resume to jobs@alpsoft-tech.com stating your current salary, expected salary and the notice period.</font>]]></description>
<date>5/27/2008</date>
<time>4:25:00 PM</time>
<link>http://blog.8pixel.net/?view=plink&amp;id=161</link>
<id>161</id></item>
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<title><![CDATA[IT DEMAND MANAGEMENT ENGINEER]]></title>
<description><![CDATA[<p><font face="Arial">Job&nbsp; :<br />&middot;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; Manage IT Change and Release Management activities and processes:<br />o&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; Manage the operational approval and release of changes to IT applications and infrastructure<br />o&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; Develop or improve processes to manage and control changes to the IT environment<br />o&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; Work with various parties to establish process understanding and adherence<br />&middot;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; Manage IT Project Demand Funnel process activities:<br />o&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; Provide tactical support to the IT Project Request Submission and Approval Process<br />o&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; Work with Project Requestors to ensure pre-requisites are met<br />o&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; Maintain the IT Project Request Funnel Database to reflect current status<br />o&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; Coordinate Project Request Review Meetings with Requestor and Governance Team<br />&sect;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; Manage Activities within IT Project Management Office:<br />o&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; Provide tactical support to the IT Project Management Framework/Standards<br />o&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; Ensure adoption of IT Project Management Standards by Project Managers<br />o&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; Track key Project Metrics and generate reports<br />Req&nbsp; :<br />&sect;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; Degree in Information Technology or equivalent with a minimum of 3-5 years of working experience<br />&sect;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; Experience in the following areas are a plus: Governance, IT Change Management, IT Project Management, Oracle ERP application<br />&sect;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; Aptitude for managing processes, strong verbal/written communication skills<br />Please submit resume to jobs@alpsoft-tech.com stating your current salary, expected salary and the notice period of commencement.</font></p><p><font face="Arial"></font>&nbsp;</p>]]></description>
<date>5/27/2008</date>
<time>4:20:00 PM</time>
<link>http://blog.8pixel.net/?view=plink&amp;id=160</link>
<id>160</id></item>
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<title><![CDATA[SENIOR CUSTOMER SERVICE ENGINEER]]></title>
<description><![CDATA[<p><font face="Arial">Job&nbsp; :<br />&middot;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; Provide day-to-day customer support on request for information.<br />&middot;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; Perform the implementation and execution of customer returns process.<br />&middot;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; Host/Coordinate customer visits, developing and maintaining relationships with customers to <br />&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; further increase customer satisfaction level.<br />&middot;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; Coordinate and drive quality improvement program with product line.<br />Req&nbsp; :<br />&middot;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; Master/Degree in Electrical/Electronics/MicroElectronics Engineering <br />&middot;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; Preferably 3-5 years relevant experience.<br />&middot;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; Experience on failure analysis in optoelectronic or silicon is an added advantage<br />Please submit resume to jobs@alpsoft-tech.com stating your current salary, expected salary and the notice period of commencement.</font></p><p><font face="Arial"></font>&nbsp;</p>]]></description>
<date>5/27/2008</date>
<time>4:19:00 PM</time>
<link>http://blog.8pixel.net/?view=plink&amp;id=159</link>
<id>159</id></item>
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<title><![CDATA[SENIOR/R&D TEST ENGINEER]]></title>
<description><![CDATA[<p><font face="Arial">Senior/R&amp;D Test Engineer&nbsp; (only applicable to Chinese candidate as there is a need to liasie with counterpart and outsource vendor in China)<br />Job&nbsp; :<br />&middot;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; Be part of our test engineering team chartered to provide R&amp;D test support for fiber optics transceiver testing at various international sites of our contract manufacturers <br />&middot;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; Opportunities to learn about fiber optics transceiver product test knowledge and at the same time, drive initiatives on continuous test improvement to enhance testers&rsquo; efficiency. These constitute reducing test time, developing new test methodologies and establishing effective hardware configuration for ease of maintenance <br />&middot;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; Work with US/Italy R&amp;D counterparts on test improvement; manage NPI test development and resources to ensure prompt release of R&amp;D testers to production lines; as well as generate and maintain up-to-date test documentation<br />Req&nbsp; :<br />&middot;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; Masters/Degree in Electrical/Electronics Engineering with 1 - 3 years&rsquo; related experience in manufacturing testing and a basic understanding of fiber optics technology trends. Fresh graduates are also welcome to apply <br />&middot;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; Functional knowledge of Agilent/JDSU fiber optics test equipment will be advantageous; whilst good analytical and troubleshooting skills as well as ability to speak and write simple Mandarin are essential <br />&middot;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; Able and willing to travel overseas <br />&middot;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; Creativity and proficiency in software programming are required; whilst knowledge of VEE, VC++ and SQL will be advantageous<br />Please submit resume to jobs@alpsoft-tech.com stating your current salary, expected salary and the notice period of commencement.</font></p><p><font face="Arial"></font>&nbsp;</p>]]></description>
<date>5/27/2008</date>
<time>4:17:00 PM</time>
<link>http://blog.8pixel.net/?view=plink&amp;id=157</link>
<id>157</id></item>
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<title><![CDATA[CM/ODM RESIDENT QUALITY SENIOR ENGINEER/SPECIALIST]]></title>
<description><![CDATA[<p><font face="Arial">Responsibilities: <br />Drive improvement projects at client CM/ODM to establish a robust quality system and no defect slip through to end customer <br />Provides guidance, expertise and services to ensure process and product quality <br />Work with Division/QA to support the NPI activities and customer audit readiness <br />Be the client focal person in CM/ODM to handle and manage quality improvement <br />Requirements:<br />Bachelors or Master degree or University Degree or equivalent.&nbsp;&nbsp; <br />At least 3 year(s) of working experience in the related field is required for this position. <br />Experience in CM/ODM management, <br />Applicants must possess strong leadership and able to drive CM/ODM. <br />Good in statistical knowledge and familiar with 8D, FMEA. <br />Applicants must be able to speak Thai &amp; English language. <br />Applicants to be based in sub-con vendor in Bangkok.<br />Applicants must be willing to travel when required. <br />Please submit resume to jobs@alpsoft-tech.com stating your current salary, expected salary and the notice period of commencement.</font></p><p><font face="Arial"></font>&nbsp;</p>]]></description>
<date>5/27/2008</date>
<time>4:16:00 PM</time>
<link>http://blog.8pixel.net/?view=plink&amp;id=156</link>
<id>156</id></item>
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<title><![CDATA[R&D LAYOUT DESIGN ENGINEER]]></title>
<description><![CDATA[<font face="Arial">Job&nbsp; :<br />* Designs and develops integrated circuits layout design<br />* Works within a team and across teams to develop complex integrated circuits layout design of analog and mixed-signal natures. <br />* Solves problems of various scope and complexity.<br />Req&nbsp; :<br />* Degree/Diploma in Electronics and Circuit Design. <br />* Prior IC design knowledge and CAD tools experience highly desired.<br />Please submit resume to jobs@alpsoft-tech.com stating your current salary, expected salary and the notice period of commencement.</font>]]></description>
<date>5/27/2008</date>
<time>4:14:00 PM</time>
<link>http://blog.8pixel.net/?view=plink&amp;id=155</link>
<id>155</id></item>
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<title><![CDATA[PACKAGE DESIGN SIGNAL INTEGRITY ENGINEER/SENIOR ENGR/PRINCIPAL ENGR]]></title>
<description><![CDATA[<font face="Arial">As part of world wide ASIC package design team, you will work closely with substrate designers &amp; suppliers, ASIC chip design &amp; characterization teams, test hardware designers and external customers to meet design requirements, performance expectations and release to project milestones. Provide layout &amp; signal / power integrity specific feedback &amp; guidelines on the silicon, package &amp; board design. Support all Signal &amp; Power Integrity requirements for the project. Provide electrical modeling; analyze electrical performance and perform optimization to meet both internal needs and external customer requirements. Support RFQ and package selection process. Conceptualize and develop innovative solutions to meet high speed electrical performance challenges in cost effective substrate technologies. Develop techniques to determine optimal design rules for substrate layout without exhaustive modeling.<br />Skills Required:<br />o Master / Degree in Electrical / Electronics Engineering.<br />o Minimum 3~8 years of wire bond &amp; flip chip package design &amp; SI /PI modeling experience of cost effective / high performance packages.<br />o Experience in electrical modeling &amp; analysis tools &ndash; Polar, TPA, HFSS, SIWave, Paksi, ADS, and others; perform signal &amp; power integrity analysis, interpretation and substrate &amp; board design optimization will be preferred. <br />o Experience in substrate layout tool eg Cadence APD will be preferred. <br />o Familiar with advanced wire bond &amp; flip chip packaging substrates and technologies and the necessary design rules<br />o Good team player and interpersonal skills<br />o Communicate extensively with internal and external team members in various global locations and may require travel from time to time <br />o Experience in wire bond &amp; flip chip package development or assembly process,&nbsp; other CAD tools is an added advantage <br />Please submit resume to jobs@alpsoft-tech.com stating your current salary, expected salary and the notice period of commencement.</font>]]></description>
<date>5/27/2008</date>
<time>4:02:00 PM</time>
<link>http://blog.8pixel.net/?view=plink&amp;id=154</link>
<id>154</id></item>
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<title><![CDATA[PACKAGE DESIGN ENGINEER]]></title>
<description><![CDATA[<p><font face="Arial">Job Description<br />Become a member of a high powered world wide team responsible for designing custom Enterprise ASIC packages.&nbsp; A primary focus is on high-speed / high density digital and SerDes signal routing in multi-layer ceramic and organic laminate technologies. Must have experience in package substrate layout / design using Cadence APD design tool, along with a strong understanding of critical package signal integrity and electrical parasitic. Knowledge of electrical, thermal, and / or mechanical modeling tools is a plus. <br />Responsibilities include working with multiple internal and external silicon chip design teams, reliability / qualification teams, test characterization teams, suppliers and customers for the development of a total ASIC package solution, to meet the design requirements, performance expectations and release to project milestones.&nbsp; This includes creation of package netlists, package stack up and routing methodologies, feedback (to chip team) on device layout and chip floor planning &amp; (to customer) on package pin-out &amp; board design requirements, final package designs, external lid designs and documentation. Work with external assembly houses and substrate / lid suppliers to meet design requirements and release designs to production. This position also requires support to RFI/RFQ package selection process with knowledge of cost / performance trade-offs with respect to thermal/electrical/mechanical performance for various packaging technologies. Knowledge in packaging technologies and assembly processes is a plus. <br />Qualifications&nbsp; :<br />A Bachelor or Master of Science Degree in Electrical, Electronics Engineering or similar, with at least 5-7 years of experience of high speed, high pin count custom ASIC package design work. Good team player with strong communication, organizational, and documentation skills required.<br />Tools&nbsp; :<br />Required: Cadence APD, AutoCAD, Microsoft Office (Word, Excel and Power Point). Familiarity with Perl, SKILL, Raphael 2-D Maxwell Solver, Ansoft TPA / HFSS / SIWave, Polar SI9000e/8000m Transmission Line Field Solver, CST Microwave Studio, Flomerics-Flortherm and Agilent ADS a plus.<br />Please submit resume to jobs@alpsoft-tech.com stating your current salary, expected salary and the notice period of commencement.</font></p><p><font face="Arial"></font>&nbsp;</p>]]></description>
<date>5/27/2008</date>
<time>4:00:00 PM</time>
<link>http://blog.8pixel.net/?view=plink&amp;id=153</link>
<id>153</id></item>
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<title><![CDATA[Engineer (PLC)]]></title>
<description><![CDATA[<font face="Arial">Responsibilities:<br />Design and implement automation and control solutions to meet the<br />factory requirements with regards to product and process development.<br />Troubleshoot equipment problems to Resolution and Implement Corrective<br />Action.<br />Provide Engineering Support to equipment maintenance, process<br />engineering and process development.<br />Liaising with contractor/vendors to ensure all work is carried out<br />correctly and to a high standard within agreed time frames.<br />Manage projects within business excellence framework.<br />Requirements:<br />Diploma/Degree in Electrical/Instrumentation Engineering<br />Possess at least 2 years experience in related area<br />PLC and HMI Programming.<br />Knowledge in control panel design.<br />VB/VC++ Motion Control Programming Skills is preferable.<br />Able to work independently and as a team.<br />Able to travel occasionally to China and Indonesia<br />Please submit resume to jobs@alpsoft-tech.com stating your current salary, expected salary and the notice period of commencement.</font>]]></description>
<date>5/27/2008</date>
<time>1:35:00 PM</time>
<link>http://blog.8pixel.net/?view=plink&amp;id=152</link>
<id>152</id></item>
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<title><![CDATA[Electrical Engineer]]></title>
<description><![CDATA[<font face="Arial">Responsibilities:<br />Responsible for the design, development and testing of electrical<br />hardware circuitry used in production equipment.<br />Liaise with customers on the specifications and on-site installation of<br />the equipment.<br />Participate in engineering support activities which include value-added<br />and cost down activities, investigating and troubleshooting problems due<br />to electrical failures.<br />Project management and execution<br />Lead a group of members and involve in improvement activities<br />Requirements:<br />Degree in Electrical Engineering<br />At least 3 to 4 years of experience in mechanical or Electrical<br />background<br />Fresh graduate will be considered for contract post.<br />Possess analog and digital hardware design, microprocessor assembly<br />language programming<br />Independent, willing to learn, hardworking, proactive person<br />A good team player with good interpersonal and communication skills<br />Excellent verbal and written communication skills<br />Please submit resume to jobs@alpsoft-tech.com stating your current salary, expected salary and the notice period of commencement.</font>]]></description>
<date>5/27/2008</date>
<time>1:33:00 PM</time>
<link>http://blog.8pixel.net/?view=plink&amp;id=151</link>
<id>151</id></item>
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<title><![CDATA[Engineer (Coating)]]></title>
<description><![CDATA[<font face="Arial">Responsibilities:<br />Need to setup the new Anti-Reflection Coating Machine<br />Setup maintenance schedule to ensure quality of coating and optical<br />characteristics<br />Training of technicians and operators<br />Meeting production capacity and output on schedule<br />Control of repair and maintenance cost within budget<br />Able to made improvement plan to meet cost target<br />Requirements:<br />At least 3 to 4 years of experience in mechanical or Electrical<br />background<br />Possess AR coating experience<br />Possess preventive maintenance know-how and basic optical know-how<br />Independent, willing to learn, hardworking, proactive person<br />A good team player with good interpersonal and communication skills<br />Able to read &amp; write English &amp; Mandarin<br />Please submit resume to jobs@alpsoft-tech.com stating your current salary, expected salary and the notice period of commencement.<br /></font>]]></description>
<date>5/27/2008</date>
<time>1:30:00 PM</time>
<link>http://blog.8pixel.net/?view=plink&amp;id=150</link>
<id>150</id></item>
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